The LS1012a PBL uses the following for QSPI boot:
0x03 as READ command
24-bit address mode
Operate at minimum speed of 15 MHz
Perhaps your problem concerns to byte ordering in RCW and u-boot for QSPI.
See attached snapshot. This file shows the LS1021aRDB PBL (address 0x4000_0000) and u-boot (address 0x4010_0000).
Find the following
40000080: 00000200 09570158 00000001 894c0014
40000090: 000f400c 09550000 40006108 15c98e05
The 894c0014 000f400c code is the following command:
write - 0x000F400C at address ox01550000 // set QSPI_MCR[END_CFG] to 0b11
Have a great day,
Pavel Chubakov
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