In the P5040 reference manual Document Number: P5040RM Rev. 3, 6/2016, Table 4-10 states that when Frame manager clock select RCW bit(225 and 226) is set as ‘1’, FM clock will be “ Core cluster 3 PLL/2 or /4”. Please clarify when this bit is set as "1" what will be the frame manager clock? Will it be Core cluster 3 PLL/2 OR Core cluster 3 PLL/4. Please see the attached snapshot
