my new board use P1011 device and for POR Configuration i use 4.7K resistor for pull-up/down not CPLD
i use that value based on P1020RDB schematic
P1020RDB use CPLD but POR page has pull-up/down resistors so i followed
POR configuration Pins are connected with other ICs but those are high-impedance when hreset is asserted
but sometimes POR configuration value is not set to Pull-up/down setting
if boot fail i checked the values by codewarror
i wondoer the resistor value is not correct , how do i chose pull-up/down resistor ?
thank you in advance
According to the P1020 Family of QorIQ Integrated Processors Design Checklist, 3.1 Configuration and Timing the 4.7 kOhm is correct value for the configuration resistor.
Please check whether an external device (latch) with Bus Hold functionality is used in the design.
If this is not the case please create a technical case (How I could create a Service Request? ) and provide connection schematics as searchable PDF along with pjojected configuration settings and checked by CodeWarrior ones.