PCIe Issue

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PCIe Issue

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senthilkumarg
Contributor I

In our custom board, we configured Serdes3 for PCIe as SRDS_PRTCL_S3 = 1 and connected to PCIe switch as 8x. The configuration is done in RCW. After power T4240 is not coming out of reset as reset_reqB signal is low. So we configured SRDS_PRTCL_S3 = 3 in RCW, T4240 boots properly and detects the PCIe controller. But though PCie configured in Root complex mode, PCI scan in U-boot not able to detect the PCIe switch. Both the cases PLL2 is powered down as we don't have PLL2 clock in our configuration. Is PLL2 clock required for SRDS_PRTCL_S3 = 1.

1. Why reset_reqB signal is going low when PCIe configured as 8x using SRDS_PRTCL_S3 = 1 in RCW.
2. PCI scan is not able detect the swtich though its boots properly when SRDS_PRTCL_S3 = 3.

rgds,

sk

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ufedor
NXP Employee
NXP Employee

You wrote:

> we don't have PLL2 clock in our configuration

Please provide the processor connection schematics as searchable PDF for inspection.

1) Please provide binary image of the RCW.

2) Please provide binary image of the RCW, U-Boot booting log and PCI scan log.

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