cFree Counter Basics

[alexit]

I am seeking to clarify just how the Free Counter bean works with the Timer. I am still working on measuring two asynch frequency signals. I am using two Capture beans but to control timing of the calculations needed for the device to function I have added a Free Counter. All of these need to share TPM1 of the QD4 micro (its the only one available.)

My three ISRs look like this:

On_Capture1

if(FC1_GetCounterValue(&time) == ERR_OK)

{

if(Signal1_overflow <1)

{

Signal1_period = time - lasttime1;

lasttime1 = time;

}

}

On_Capture2

if(FC1_GetCounterValue(&time) == ERR_OK)

{

if(Signal2_overflow <1)

{

Signal2_period = time - lasttime2;

lasttime2 = time;

}

}

FC1_OnInterrupt

{

Signal1_overflow++;

Signal2_overflow++;

.../* Error traps for too many overflows */

Calculate = TRUE;

}

Ocassionally Signal1 and Signal2 ISRs coincide, which is when the calcualtions start to show errors. How does FC1_GetCounterData differ fom Capture1_GetCaptureValue?

Thanks,D

[marek_neuzil]

Hello David,

The Capture component provide different functionality than the FreeCounter. The Capture1_GetCaptureValue method returns the value of the latch register. The FC1_GetCounterData return current value of the counter, i.e. when you want to measure a period of signal, you need to latch the value of the counter when the edge (raising/failing/both) occurs. Therefore the Capture component should be used.

See the functionality of the Timer module in the QD4 datasheet (http://cache.freescale.com/files/microcontrollers/doc/data_sheet/MC9S08QD4.pdf) chapter 11.4.2.1 Input Capture Mode.

Best Regards,

Marek Neuzil

.

[alexit]

Thank you, to be sure I have this correct:

Cap1_GetCaptureValue = latch register

FC1_GetCounterValue = counter value

So what happens when I use Cap1_Reset? Does this "zero" the register value?

I think my problem is I am seeing the Overflow ISR even when I use the Reset. I am trying to either overflow (no frequency signal received) or not enter the overflow at all...

Thanks,D

[marek_neuzil]

Hello David,

Yes, the Capture component use the latch register. When you use the Cap1_Reset method the counter of the timer is reset (but there is not any HW synchronization with the signal).

If you want to measure the signal period, you must do the reset and then use two capture values at least (use Cap1_GetCaptureValue when On_Capture event occurs). The difference of these two values correspond to the signal period. The overflow of the counter is not problem, you just must adjust the calculation of these two capture values. Usage of the Reset method depend on purpose of your application and if you want to do continuous measurement or on a request, e.g. you can use the Reset method in the initialization part of your code and then continuously use captured values (call GetCaptureValue method in the On_Capture) and overflow event (when a overflow event occured betwen to capture On_Capture events the calculation is changed) to compute the diff. time

Please note that If you use two channels of one timer you can compute the difference of two signals (e.g. rising edge difference) by using these captured values of these two channels. See the timer description in the reference manual of the QD4 derivative.

Best Regards,

Marek Neuzil

[alexit]

I believe I've found my issue, because I have two different signals to capture when testing one single vs both together was causing my issue. If I look at the expanded function within the Capture bean this is what I see:

Cap1_GetCaptureValue(&Sig1Time) is expanded as (((*(word*)(&Sig1Time) = _TPMC0V.Word), \  (*(word*)(&Sig1Time) -= Cap1_CntrState)), \ 0U)

Cap1_Reset() is expanded (Cap1_CntrState = _TPMCNT.Word , (byte)0U)

Cap2_GetCaptureValue(&Sig2Time) is expanded (((*(word*)(&Sig2Time) = _TPMC1V.Word), \  (*(word*)(&Sig2Time) -= Cap2_CntrState)), \  0U)

Cap2_Reset() is expanded (Cap2_CntrState = _TPMCNT.Word , (byte)0U)

but when i have only one bean enabled this changes to:

Capx_GetCaptureValue(&SigxTime) is expanded (*(word*)(&SigxTime) = _TPMCxV.Word , (byte)0U)

Capx_Reset() is expanded (TPMCNTH = 0U , (byte)ERR_OK)

Because I read TPMCNT as part of a system tick too, the single enabled bean version where reset is setting TPMCNTH = 0 seems to be the source of this.

Thanks again, D