Ho to read GPIO input already routed to input capture

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Ho to read GPIO input already routed to input capture

Jump to solution
221 Views
_Ferrari_
Contributor V

Hello,

I am developing a project based on the MCXA153VLH microprocessor.
A PWM signal is applied to pin 16 (P2_2). Following your previous suggestions and by modifying the CTIMER_Init routine, I have successfully implemented the duty cycle measurement.

However, the signal on P2_2 may occasionally stay at a stable logic level (constant 0 or 1). To handle this, I have implemented a timeout period; once triggered, I need to read the actual logic state of the P2_2 pin.

Could you please advise on how to properly configure pin P2_2 so it can be used both for Input Capture (via CTIMER) and as a GPIO for state reading?

Thank you very much for your help and cooperation.

Best regards,

Tags (3)
0 Kudos
Reply
1 Solution
111 Views
Celeste_Liu
NXP Employee
NXP Employee

Hello @_Ferrari_ ,

Thanks for your post.

For the MCXA153, this can be implemented as follows:

1. Configure P2_2 to its CTIMER input function, i.e. set ALT4 = CT_INP12;
2. Use the corresponding INPUTMUX to route a selected CTIMER CAP channel to CT_INP12;
3. After a timeout occurs, read the corresponding bit in the GPIO input status register (PDIR) directly.

Please note that the GPIO PDIR register always reflects the actual logic level of the pin, regardless of which digital function the pin is configured for.

Celeste_Liu_0-1777285723740.png

 

Hope it helps.

BR

Celeste

 

------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the "ACCEPT AS SOLUTION" button. Thank you!
------------------------------------------------------------------------------------------------------------------

View solution in original post

0 Kudos
Reply
1 Reply
112 Views
Celeste_Liu
NXP Employee
NXP Employee

Hello @_Ferrari_ ,

Thanks for your post.

For the MCXA153, this can be implemented as follows:

1. Configure P2_2 to its CTIMER input function, i.e. set ALT4 = CT_INP12;
2. Use the corresponding INPUTMUX to route a selected CTIMER CAP channel to CT_INP12;
3. After a timeout occurs, read the corresponding bit in the GPIO input status register (PDIR) directly.

Please note that the GPIO PDIR register always reflects the actual logic level of the pin, regardless of which digital function the pin is configured for.

Celeste_Liu_0-1777285723740.png

 

Hope it helps.

BR

Celeste

 

------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the "ACCEPT AS SOLUTION" button. Thank you!
------------------------------------------------------------------------------------------------------------------

0 Kudos
Reply
%3CLINGO-SUB%20id%3D%22lingo-sub-2353815%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3EHo%20to%20read%20GPIO%20input%20already%20%20routed%20%20to%20input%20capture%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2353815%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3EHello%2C%3C%2FP%3E%3CP%3EI%20am%20developing%20a%20project%20based%20on%20the%20MCXA153VLH%20microprocessor.%3CBR%20%2F%3EA%20PWM%20signal%20is%20applied%20to%20pin%2016%20(P2_2).%20Following%20your%20previous%20suggestions%20and%20by%20modifying%20the%20CTIMER_Init%20routine%2C%20I%20have%20successfully%20implemented%20the%20duty%20cycle%20measurement.%3C%2FP%3E%3CP%3EHowever%2C%20the%20signal%20on%20P2_2%20may%20occasionally%20stay%20at%20a%20stable%20logic%20level%20(constant%200%20or%201).%20To%20handle%20this%2C%20I%20have%20implemented%20a%20timeout%20period%3B%20once%20triggered%2C%20I%20need%20to%20read%20the%20actual%20logic%20state%20of%20the%20P2_2%20pin.%3C%2FP%3E%3CP%3ECould%20you%20please%20advise%20on%20how%20to%20properly%20configure%20pin%20P2_2%20so%20it%20can%20be%20used%20both%20for%20Input%20Capture%20(via%20CTIMER)%20and%20as%20a%20GPIO%20for%20state%20reading%3F%3C%2FP%3E%3CP%3EThank%20you%20very%20much%20for%20your%20help%20and%20cooperation.%3C%2FP%3E%3CP%3EBest%20regards%2C%3C%2FP%3E%3C%2FLINGO-BODY%3E%3CLINGO-LABS%20id%3D%22lingo-labs-2353815%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CLINGO-LABEL%3EComponent%20Development%20Environment%3C%2FLINGO-LABEL%3E%3CLINGO-LABEL%3EComponent%20Exchange%3C%2FLINGO-LABEL%3E%3CLINGO-LABEL%3EEmbedded%20Components%3C%2FLINGO-LABEL%3E%3C%2FLINGO-LABS%3E%3CLINGO-SUB%20id%3D%22lingo-sub-2356522%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%20translate%3D%22no%22%3ERe%3A%20Ho%20to%20read%20GPIO%20input%20already%20%20routed%20%20to%20input%20capture%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2356522%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3EHello%26nbsp%3B%3CA%20href%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fuser%2Fviewprofilepage%2Fuser-id%2F202847%22%20target%3D%22_blank%22%3E%40_Ferrari_%3C%2FA%3E%26nbsp%3B%2C%3C%2FP%3E%0A%3CP%3EThanks%20for%20your%20post.%3C%2FP%3E%0A%3CP%3EFor%20the%20MCXA153%2C%20this%20can%20be%20implemented%20as%20follows%3A%3C%2FP%3E%0A%3CP%3E1.%20Configure%20P2_2%20to%20its%20CTIMER%20input%20function%2C%20i.e.%20set%20ALT4%20%3D%20CT_INP12%3B%3CBR%20%2F%3E2.%20Use%20the%20corresponding%20INPUTMUX%20to%20route%20a%20selected%20CTIMER%20CAP%20channel%20to%20CT_INP12%3B%3CBR%20%2F%3E3.%20After%20a%20timeout%20occurs%2C%20read%20the%20corresponding%20bit%20in%20the%20GPIO%20input%20status%20register%20(%3CSTRONG%3EPDIR%3C%2FSTRONG%3E)%20directly.%3C%2FP%3E%0A%3CP%3EPlease%20note%20that%20the%20GPIO%20PDIR%20register%20always%20reflects%20the%20actual%20logic%20level%20of%20the%20pin%2C%20regardless%20of%20which%20digital%20function%20the%20pin%20is%20configured%20for.%3C%2FP%3E%0A%3CP%3E%3CSPAN%20class%3D%22lia-inline-image-display-wrapper%20lia-image-align-inline%22%20image-alt%3D%22Celeste_Liu_0-1777285723740.png%22%20style%3D%22width%3A%20400px%3B%22%3E%3Cspan%20class%3D%22lia-inline-image-display-wrapper%22%20image-alt%3D%22Celeste_Liu_0-1777285723740.png%22%20style%3D%22width%3A%20356px%3B%22%3E%3Cimg%20src%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fimage%2Fserverpage%2Fimage-id%2F383671i9A3DA06C94B7248F%2Fimage-size%2Fmedium%3Fv%3Dv2%26amp%3Bpx%3D400%22%20role%3D%22button%22%20title%3D%22Celeste_Liu_0-1777285723740.png%22%20alt%3D%22Celeste_Liu_0-1777285723740.png%22%20%2F%3E%3C%2Fspan%3E%3C%2FSPAN%3E%3C%2FP%3E%0A%3CBR%20%2F%3E%0A%3CP%3EHope%20it%20helps.%3C%2FP%3E%0A%3CP%3EBR%3C%2FP%3E%0A%3CP%3ECeleste%3C%2FP%3E%0A%3CBR%20%2F%3E%0A%3CP%3E------------------------------------------------------------------------------------------------------------------%3CBR%20%2F%3ENote%3A%20If%20this%20post%20answers%20your%20question%2C%20please%20click%20the%20%22ACCEPT%20AS%20SOLUTION%22%20button.%20Thank%20you!%3CBR%20%2F%3E------------------------------------------------------------------------------------------------------------------%3C%2FP%3E%3C%2FLINGO-BODY%3E