SDRAM not working on MPC8260A

[eugenetodoruk]

Hello everybody,

I work with specific board with MPC8260A (HiP4 Rev 14, Mask B.1 4K25A) and 128MB SDRAM (MT48LC32M16A2 ). I try to configure MODCK_H and I see following. When I set MODCK_H = 5 SDRAM is working, but in any other case I get many SDRAM errors. Why is this happening?

There are plenty of ways to configure MODCK_H listed in the MPC8260AEC document.

I can not configure MODCK_L, it usually has 111 value.

My SDRAM has input clock 33.333 MHz.

Working variant:

MPC8260 Clock Configuration

- Bus-to-Core Mult 3x, VCO Div 2, 60x Bus Freq  33-100, Core Freq 100-300

- dfbrg 0, corecnf 0x08, busdf 3, cpmdf 1, plldf 0, pllmf 1, pcidf 3

- vco_out  133332000, scc_clk   33333000, brg_clk   33333000

- cpu_clk   99999000, cpm_clk   66666000, bus_clk   33333000

CPU:   MPC8260 (HiP4 Rev 14, Mask B.1 4K25A) at 99.999 MHz

Thanks

[alexander_yakov]

MPC8260AEC shows several clock configuration modes - which mode you are using? "Local Bus Mode", "PCI Host Mode" or "PCI Agent Mode"?

Clock mode is configured by three input pins—PCI_MODE, PCI_CFG[0], PCI_MODCK (see Table 15).

You said your SDRAM works only with MODCK_H = 5 while MODCK_L is always "111". This leads to clock mode "0101_000".

This mode is available only for "Local Bus" mode, but input frequency in this mode should be 66 Mhz.

In your case you said input clock is 33 Mhz. Please clarify.

[eugenetodoruk]

Yes, I use "Local Bus" mode.

My clock mode now is "0101_111", (CPM Multiplication Factor = 2, Core Multiplication Factor = 3)

>>You said your SDRAM works only with MODCK_H = 5 while MODCK_L is always "111". This leads to clock mode "0101_000".

Why does "111" lead to "000"?

>>input frequecny in this mode should be 66 Mhz.

Only 66 MHz? I can not use other input clock frequency?

I think 66MHz is only an example.

quote from AEC:

"The user should choose the input clock frequency and the multiplication factors such that the frequency of the CPU

is equal to or greater than 150 MHz and the CPM ranges between 66–233 MHz."

Can I choose between 33MHz and 66Mhz?

[alexander_yakov]

No, you can not use 33 Mhz because in this case core frequency will be 100 Mhz, which is below allowed 150 Mhz.

[eugenetodoruk]

Ok.

I tried to solder different oscillators (25 MHz, 33.333 MHz, 40 MHz, 50 MHz, 66MHz) and I tried to set all possible clock modes using MODCK_H.

My SDRAM is working only at 33MHz and 40MHz and at MODCK_H=5.

Nevertheless I must get core frequency above than 150MHz.

What do I do?

[alexander_yakov]

MPC82xx SDRAM controller is not configured after power-on and needs to be configured in user software.

SDRAM controller configuration settings depend on SDRAM frequency.

So, SDRAM initialization sequence you are using for 33 Mhz may be incorrect for 66 Mhz.

[eugenetodoruk]

Yes, I know. I correct timings in accordance with the bus frequency.

I configure registers LSRT, MPTPR and LSDMR. And I'm sure that everything is correct.

Any ideas why SDRAM is working only when MODCK_H=5?

[alexander_yakov]

The only obvious idea - SDRAM configuration error.

This problem requires further debugging.