>Is there a way to test powerpc L1 instruction cache
L1 instruction cache is protected by one parity bit per instruction, no parity checking on tags. Parity errors cause machine check exception and you would get this exception in the case of error.
The only way to get data values into the instruction cache is to fetch them as instructions from memory into the L1 i-cache. To test the values, they must be executed as instructions. There is no way to run pattern type test through the L1 i-cache.
>my system does not corrupt with L1 cache disabled
Typically, this behaviour is the indication of problems on system bus or external memory. When L1 Icache is disabled then most transactions from the core are sparced and may not cause issues whereas enabling L1 cache makes dense activities on the bus.
My suggestion is to perform a intense memory testing with the test code locked in L1 Icache.
Have a great day,
Pavel
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