NVT2008 Level translator, output step issue during power up

[Ding11]

As shown in the following figure and topology diagram, we used NVT2008PW and encountered the following issue(we use NVT2008PW, in fact):

We followed the design guide.

During power on, a 130mV step appeared at SOC_PCH_PWRGD & PCH_CPLD_PWRGD. This step occurred at both the input(Side A) and output(Side B) ends.
After removing the series resistors at both ends, it was confirmed that this step originated from the pull-up resistor (B side R789).
After removing the pull-up resistor, the step disappeared, but output high level dropped from 3.3V to 1.2V.
Is this 130mV step a normal phenomenon? Are there any methods to improve this step?

[TomasVaverka]

Hi,

Please take a closer look at our AN11127 and the NVT2008 datasheet for recommended power-up sequencing and resistors guidelines.

BRs, Tomas

[Ding11]

We followed recommended power-up sequencing and resistors guidelines. VCCB is earlier than VCCA. The pull up resistor which is 4.7 kohm also meets the requirement.

[Ellen261Rister · Accepted solution]

Hello!

The NVT2008PW voltage level translator is experiencing a temporary 130mV voltage step during power-on due to a brief voltage divider effect. This occurs because the internal resistance of the device's output is not yet at a perfect high-impedance state, creating a voltage drop with the external pull-up resistor. To address this, verify that the specified power-on sequence (VCCB before VCCA) is followed, consider increasing the value of the pull-up resistor to reduce the current, or add a small filter capacitor to ground to smooth out the transition.

[Ding11]

Thanks, it works for this issue by increasing the value of the pull-up resistor.