FS4500 SBC Software Implementation Queries

[VN]

Hi,

The SDK (embedded software solution) for the FS65/FS45 software driver implementation seems to diverge from the AN5238 documentation. The following are some observations and queries:
1. The application note suggests writing to INIT_INT after writing to the INIT_MAIN registers. But the SDK code does so after writing to both the INIT_MAIN and INIT_FS registers. My understanding is that this is because writing to INIT_INT locks the INIT (including the INIT_FS) registers. This would mean that the SDK implementation is accurate but would appreciate a confirmation.
2. The application note suggests checking the BAT_FAIL bit in INIT_VREG to determine whether the INIT_MAIN registers should be configured (based on a POR or wake up from LPOFF). The SDK however reads the MODE register to determine the current and previous SBC mode and make the decision. Would appreciate a clarification on the reason for the deviation from the documentation, the recommended approach and advantages (if any) or scenarios for choosing one approach over the other.

Thanks and Regards,
Vimal

[TomasVaverka]

Hi Vimal,

1. The FS45/65 contains 2 independent digital blocks:

-  The Main state machine, INIT phase closed writing in the INIT_INT register. No time out limitation.

-  The Fail Safe state machine, INIT phase closed at first good WD refresh. Fail Safe INIT phase is time out limited at 256ms, meaning Fail Safe INIT phase should be closed before 256ms.

2. With the help of the BAT_FAIL bit is only possible to find out if a POR has occurred and if it is necessary to re-initialize both Main and Fail Safe state machines. If the POR did not occur, it would still be necessary to find out if there was a wake-up from the LPOFF, after which the FSSM must be re-initialized. So by skipping this BAT_FAIL step and reading the MODE register directly, one finds both information (if a POR has occurred, SBC is in Init mode, if SBC was previously in LPOFF, it is normal and RESUME_LPOFF is set). This was recommended to us during the development of this demo driver.

Best regards,

Tomas

[VN]

Hi Tomas,

Thank you for responding to my queries..

1. So, just to confirm, the INIT_INT register can be written immediately after initializing the INIT_VREG, INIT_WU1, INIT_WU2 and INIT_INH_INT registers. If yes, is there a reason to defer this to after the FSSM initialization (yet before the first good WD refresh)?

2. My understanding based on the AN5238 application note (startup sequence flowchart) was that if BAT_FAIL is not set, it implies a wakeup from LPOFF (and, thus, only FSSM initialization is required). If this is not true, then checking the MODE register makes sense.

Best Regards,

Vimal

[TomasVaverka · Accepted solution]

Hi Vimal,

1. Yes, the INIT_INT register can be written immediately after writing to the INIT_MAIN registers, there is no specific reason for deferring this to after the FSSM initialization.

2. I would recommend using the MODE register as implemented in the driver.

Best regards,

Tomas

[VN]

Hi Tomas,

Thanks for the clarifications.

Best Regards,

Vimal