some questions about PCIe

[t_alex]

Hi,

I have gone through the Reference Manual of P3041 PCIe  but I am not clear of the following. Could someone help:

- Posted request and non-posted request: For outbound transfers, such as memory write to an external device, which one would the PCIe controller use?

- Outbound transaction size:  For example, from the software application, it performs some write into specific area predefined for PCIe outbound transfer (memory write).

How would the PCIe controller know how much data to transfer out each time?

[yipingwang]

According to PCI EXPRESS BASE SPECIFICATION

Post Requests:Messages and Memory Writes.

Non-Posted Requests : All Reads, I/O, and Configuration Writes.

The outbound transaction uses post write,the initiator writes the data to the PCI block and consider that the operation completes, later PCIe controller will send the data to the bus.

A transaction may be broken up into smaller sized transactions depending on the original

request size, transaction type, and the PCI Express device control register

[MAX_PAYLOAD_SIZE] field for write requests.

[t_alex]

That means the PCI block will aggregate data to certain length before it sends out?

(I am referring specifically to QorIQ implementation of this PCI block).

[yipingwang]

Outbound transactions use Outbound Windows, in PCIe programming, Outbound windows are located in some unused memory space and reflect windows to the destination device memory, The Outbound Window is like a piece of buffer. If you want to transfer a mount of data, it is needed to transfer data to the Outbound Window first (DMA could be used), then PCIe controller will send data to the PCIe device.

Have a great day,
Yiping Wang

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