Hello Alexander,
Thanks a lot!
I use the different HDLC peripherals of the same P1021 chip to communicate. The connection relationship is as below:
As the above figure said:
txclk_hdlc0, rxclk_hdlc1: 8M
rxclk_hddlc0, txclk_hdlc1: 16M
we have done the below experiments:
1) use 16M clock to communicate
That is, HDLC1 send and HDLC0 receive, there are only send interrupt and no receive interrupt, receive side
can not receive data;
2) use 8M clock to communicate
That is, HDLC0 send and HDLC1 receive, there are send interrupt and receive interrupt, but the receive side
will pop out error in the BD status field.
Thank you!
Carl