eLBC memory map

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eLBC memory map

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Contributor II

Can I configure eLBC memory map of P1020 as below in a same LAW:

Start address: 0x0_F0000000  ----NOR Flash start address (256MB size)

End address: 0x0_FFFFFFFF ----NOR Flash end address

Start address: 0x1_00000000  ----NAND Flash start address (2GB size)

End address: 0x1_7FFFFFFF ----NAND Flash end address

Do i need to maintain 4GB LAW size for eLBC?

I have 2GB of DDR3, 512MB PCIe, 2GB NAND, 256MB NOR and 64KB of FPGA. what could be the LAW settings for this configuration?.

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Contributor II

Hi Marius,

Well, thanks for the explanation.

I thought NAND is memory mapped to eLBC, and was trying to set the LAWs according to that. Now it is clear and i can map the NAND only for 256KB as specified in datasheet.

Regards,

Kumar

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marius_grigoras
NXP Employee
NXP Employee

Hi Kumar,

The NOR flash is a memory mapped flash, so for example if it has x GB, you must set up in the TLB, LAW and CS x GB (is not a problem if you set up more than x GB).

On the other hand, the NAND flash is not a memory mapped flash. For a 2GB flash (your example) is enough to set up in the TLB, LAW and eLBC CS only 64KB for controller size.

The FPGA case must be regarded from point of allocation as the NOR flash.

Coming back to your example is enough to set up 512MB in TLB and LAW for eLBC space.

Regards,

Marius

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Contributor II

Hi Marius,

Thanks for the Quick reply,

NAND flash chip select is assigned to CS3 of eLBC, that means it is memory mapped to eLBC, right? 

And I am not getting the point in your context "eLBC CS only 64KB for controller size"? could you please elaborate?

Regards,

Kumar


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marius_grigoras
NXP Employee
NXP Employee

Hi Kumar,

Regarding the flash types from memory point of view there are 2 types: memory mapped and memory unmapped.

The NOR flash is memory mapped and the rest ones - NAND, SPI, SD - are not memory mapped.

Basically, a memory mapped flash means that reading is similar to reading from random-access memory. You can read any address from the flash zone without using any specific algorithm. Instead, for unmapped flashes (SPI, NAND, SD) you cannot do this - you need a specific flash algorithm who knows how to make the read operations via flash controller (eLBC in this case). You can read more information about flashes principles of operation here [1].

Returning to your first question, a NAND flash is not a memory mapped flash. Any flash must be assigned to a CS - this is just a normal setting that basically means that a specific range of memory will be used for eLBC via GPCM (used for NOR) or/and FCM (used for NAND).

Being an unmapped flash, for NAND is enough to allocate space only for internal flash controller -> eLBC. This means to allocate space for eLBC registers/buffers that will be used by flash algorithm for controlling the flash device (for read/write operations).

Regards,

Marius

[1] Flash memory - Wikipedia, the free encyclopedia

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Contributor II

Hi Marius,

Well, thanks for the explanation.

I thought NAND is memory mapped to eLBC, and was trying to set the LAWs according to that. Now it is clear and i can map the NAND only for 256KB as specified in datasheet.

Regards,

Kumar

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scottwood
NXP Employee
NXP Employee

I'm not sure what you're referring to by "256KB as specified in the datasheet", but the eLBC NAND buffer is only an 8KiB window.  You can configure the chipselect for the minimum size of 32KiB.

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