Unpredictable IRQ6 behaviour on P1022 based target

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Unpredictable IRQ6 behaviour on P1022 based target

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Contributor III

We have a target based on P1022.

IRQ6 line of Processor is connected to CPLD. Line is pulled up by default.

Observation  1 : This line is being driven high permanently from CPLD. Still there are spurious interrupts seen on IRQ6 line in processor which are also increasing in a random manner. Interrupt is edge triggered (high to low)

Observation 2 : To track the status of line internally. We configured the interrupt line as input in CPLD.  Still there were spurious interrupts seen in Processor but we did not detect any change in digital level input of this line in CPLD. No change from 1 to 0 was triggered in CPLD. CPLD always received the line as high input.

The device tree node configuration for corresponding interrupt is -

ext_irq6{
interrupt-parent = <&mpic>;
interrupts = <6 3 0 0>;

};

Please suggest to identify the issue.

Regards

Ram

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NXP TechSupport
NXP TechSupport

To disable interrupt from an external PCIe device it is needed to refer to the device documentation.

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Contributor III

Value of PIC_EIVPR6 is 0x80006

I will update the rest of query in my subsequent reply.

Thanks

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Contributor III
As I understand from section 10.4.6, there is sharing between INTx and IRQn. The sharing is implemented in Hardware and can not be disabled.
The only option left is to disable the corresponding PCIe interrupt to correctly use external IRQ6.
I need to use external IRQ6, therefore to stop PCIe interrupts from coming on same IRQ(IRQ6) line, INTC interrupt line for PCI Express Controller-2 need to be disabled.
Any feedback to disable the same or any section in Ref. Manual that suggests how to disable the INTC interrupt line for PCIe2, so that I can use external IRQ6 correctly, my please be shared.
Thanks
Ram
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29 Views
NXP TechSupport
NXP TechSupport

Please provide value of the PIC_EIVPR6.

Please use a digital scope and capture trace of the IRQ6 pin voltage behaviour.

Isn't the IRQ6 shared with PCI Express 2 INTC?
Refer to the P1022 QorIQ Integrated Processor Reference Manual, 10.4.6 PCI Express INTx/IRQn sharing.

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