Hi All,
I'm trying to boot a SDK1.7 kernel on my AmigaOne X5000, a p5020 based board, and while the kernel boots, it does not detect any PCI-e devices, not even the 5020 root ports.
I can log in and use the system over serial, and can see that other SOC devices (SATA/USB/ethernet) seem to working.
Some of the problem seems to be down to removal of the lines:
pcibios_scan_phb(hose);
pci_bus_add_devices(hose->bus);
from the end of fsl_add_bridge() function in arch/sysdev/fsl_pci.c
Adding them back partially fixes the problem, but X will still not start.
Anyone got any ideas?
Regards
Darren
The removal of those lines relative to what tree? Is there a kernel on which this worked before?
pcibios_scan_phb() and pci_bus_add_devices() are called from pcibios_init() in pci_64.c (or pci_32.c), not fsl_pci.c, and I don't see a previous kernel where that was different. If you did mean pci_64.c (or pci_32.c), where do you see those lines being removed?
The changes are relative to the 3.8.13-rt9 kernel based on the SDK1.5 that the board manufacturer provided us with. This kernel works mostly fine, in fact I am using Iceweasel on the board to post this.
I have pasted my dmesg here:
You can see the Radeon DRM driver is failing on a ring test, this happens with >3.5M ram enabled, one of the reason I want to move on to a newer kernel.
And here is the output from a default SDK1.7 kernel:
The supplied source does have an additional file to provide board initialisation, it's beginning to sound like more was patched than I thought.
FYI, this is the same board AlexPerez has been having trouble with.
Hope this makes things clearer.
Thanks
Darren
Those two functions are not called in fsl_pci.c in SDK 1.5. Could you post the diff between SDK 1.5 and the modified kernel you got from the manufacturer? At least, files relevant to PCI and the board file.
Scott,
Here is the patch we apply to the kernel (both SDK1.5 and SDK1.7)
Without this patch we see nothing at all when we run lspci - not even the processors root ports (0x1957 0x0421) so how is anyone else using PCI-e devices with this kernel without a similar patch? Is there something else going on?
The Cyrus board that we are running this has PCI-e port 0 connected directly to a PCI-e 16x connector, and a 4 lane to 4 lane and 4x1 lane switch. connected to port 1, so nothing unusual in its design.
Regards
Darren
Is that the only change you've made to the SDK kernel (probably not, since this is a custom board)? PCIe certainly works with an unmodified SDK on supported evaluation boards. Do you have board code that may be doing something different from what corenet_generic.c is doing?