Query regarding P1022 TSEC GTX clock pin

[prasantahalder]

I have two question during design with P1022-

1. We are using One TSEC of P1022 in RGMII mode. Should we provide 125MHz clock in TSEC1_GTX_CLK125 pin? What should be it's source - Oscillator or external @PHY recovered clock?

2. We are using serdes1 for on 2xPCIe and one SGMII and serdes2 disabled. We provided 100MHz in SD1_REF_CLK pin and SD2_REF_CLK is grounded. Is the scheme correct or do we need to provide clock in SD2_REF_CLK pins as well?

[bpe · Accepted solution]

TSECn_GTX_CLK125 is the reference clock in RGMII mode. You must provide

this clock to the TSEC that is in RGMII mode. It can be taken from any source

that satisfies the requirements of the chip Hardware Specification.

As of the reference clock to the unused SerDes bank, yes, ground the

inputs.

Have a great day,
Platon

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