P1011 : simple precision floatting multiplication

[paulodasilvapin]

Hello,

in the E500CORERM, I can read the following for double floatting point operation:

"Additionally, an implementation may also signal overflow by comparing the exponents of the

operands. In this case, the hardware examines both exponents ignoring the fractional values. If it

is determined that the operation to be performed may overflow (ignoring the fractional values), an

overflow may be said to occur."

I'm using a simple floatting point operation (multiplication) but it seems I have the same behaviour as with double:

the assembly operation is efsmul r5,r0,r5

with r0=0x40A00000 and r5=0x7E05A364

the obtained result in target is r5=0x7F7FFFFF instead of 0x7F270C3D while it is correct in simulation

Does anyone knows if there is any errata/issue/known limitation that could explain this behaviour ?

Thanks

Paulo.

[Pavel]

Check the SPEFSCR register. It looks like that the FINXS and FOVF bits are set after this operation.

Have a great day,
Pavel Chubakov

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[paulodasilvapin]

Sorry to not have answer sooner.

I've checked the SPEFSCR register and when I configured it to generate an overflow exception, the exception is raised. And when I configure it to not generate the overflow exception, then no exception is raised and r5 is set with a result of  r5=0x7F7FFFFF instead of r5=0x7F270C3D

I've tried with another evaluation board and I've reproduced the problem. As a matter of fact, I'm not surprised that an exception is raised when you perform an overflow operation by configuring correctly the SPEFSCR register. Where I am surprised is that it generates an exception for an operation and operands which result shall not lead to an overflow. 

Do you have any errata on this microcontroller that could explain the observed overflow when it should not happen ?

Best regards 

Paulo