P1010 Config IFC interface

[xiejianwei]

I want access CPLD by use IFC of P1010 chip. so I config it

by reference the configuration of NorFlash ,but it don't work.

So , I want get the answer , how can I config the P1010 chip for

access CPLD. could you send out an example of the IFC config.

My configuration sequence is :

Step 1, Set TLB :

  Set MAS0 , MAS1, MAS2,MAS3 registers value.

Step2, Config IFC interface :

  Set IFC_CSPR3, IFC_CSOR3, IFC_FTIM0_CS3

  Set IFC_FTIM2_CS3,IFC_FTIM2_CS3,IFC_FTIM3_CS3

Step3, Set LAW access:

  Set LAWBAR3, LAWAR3

Step4, GPIO PUMX:

  Set GUTS_PMUXCR1 . 

  (I have try to set and reset LCLK bits in GUTS_PMUXCR1).

The attachment is configration code in ASM .

Regards,

XieJianwei

Original Attachment has been moved to: romInit.s.zip

[xiejianwei]

FAE say , the configuration is correct, The configuration is same to uboot.  there may be have something wrong with multiplexing on the P1010RDB .

so , we will try it on our designed board which have no multiplexing !

[xiejianwei]

I have use this config in our board . Now I can read and write the FPGA . the config is correct. but  the CPLD is still can't read and write. 

the difference between FPGA and CPLD only 16-bit data and 8-bit data width wide differences

[marius_grigoras · Accepted solution]

Hi,

Please find attached the initialization file used by us in CodeWarrior for P1010RDB (this contains the full initialization for DDR, NOR and CPLD - you can take a look only at the CPLD side).

Please note that:

     - we're moving the CCSRBAR at 0xE000_0000 (you'll need to update the code according with your ccsrbar value)

     - the code is for EWL compiler (you'll need to update the asm instructions to your compiler)

     - the CPLD initialization flow is the next one:

          - TLB init

          - LAW init

          - IFC controller init

          - CPLD regs init

Regards,

Marius

[xiejianwei]

Marius，

thank you, it's a useful reply.

I tried to  use same configuration  with the P1010RDB_init.c defined ，but i still read oxff from CPLD in p1010rdb borad.

The CPLD run the default program from Freescale.

I use Oscilloscope to Monitor IFC_CS3_N， the IFC_CS3_N is always at high voltage. why?

Regards,

Jianwei

[marius_grigoras]

Hi Jianwei,

I just found an errata A-003549 about CS3 at P1010 RDB. You can read about it here [1].

Secondly, I observed that I can read the CPLD registers from u-boot without issues. The u-boot maps the CPLD starting from 0xffb00000 - if you want make a try. I will investigate if the u-boot is making any additional workarounds for accessing the CPLD registers and I'll let you know the results ASAP.

Regards,

Marius

[1] http://www.freescale.com/docs/pcn_attachments/15629_P1010CE_RevL.pdf

[marius_grigoras]

Hi,

I think I found the root-cause. You need to use in your code next values for GCR and CCR registers:

	0xe001E40C, 0x00002800, /* GCR */
	0xe001E44C, 0x03008000	/* CCR */

Regards,

Marius

[xiejianwei]

Hi Marius，

I use uboot to load vxworks running in ram, under vxworks it can read CPLD value correctly.

SO , I'm sure issue lies in the  configuration file, but the config is seem same as uboot configuration.

I don't know how to check issues.

Regards,

Jianwei

[marius_grigoras]

Using the attached initialization file for CW the CPLD works as expected (the same u-boot behavior). Please use these settings in your configuration.

Marius

[xiejianwei]

Marius,

I send the *.tcl init file to windriver FAE。

When this issue is resolved, I'll be back reply. Thank you for your reply！

Regards，

Jianwei

[xiejianwei]

Hi Marius，

   under uboot,  i read address 0xffb00000,  this address value is 3.

   It shows under uboot configuration ，the CPLD is working properly.

   But under vxworks, i can't read correct value from CPLD.

   then I check the config . It looks the same as the code you give me.

   i have configed the pmuxcr1 LCLK to (11b). The cs3 seems no action.

The read out register is :

->

Break at 0x0010f38c: ifcTst    +0x14     Task: 0x49b1be0 (tIfcTst)

IFC_REV     Address =ffe1e000,    value = 1000000

IFC_CSPR0   Address =ffe1e010,    value = 105

IFC_CSPR1   Address =ffe1e01c,    value = 0

IFC_CSPR2   Address =ffe1e028,    value = 0

IFC_CSPR3   Address =ffe1e034,    value = ffb00085

IFC_AMASK0   Address =ffe1e0a0,    value = 0

IFC_AMASK1   Address =ffe1e0ac,    value = 0

IFC_AMASK2   Address =ffe1e0b8,    value = 0

IFC_AMASK3   Address =ffe1e0c4,    value = ffff0000

IFC_CSOR0    Address =ffe1e130,    value = e00c

IFC_CSOR1    Address =ffe1e13c,    value = c

IFC_CSOR2    Address =ffe1e148,    value = c

IFC_CSOR3    Address =ffe1e154,    value = 0

IFC_FTIM0_CS0   Address =ffe1e1c0,    value = 40050005

IFC_FTIM1_CS0   Address =ffe1e1c4,    value = 1e000f00

IFC_FTIM2_CS0   Address =ffe1e1c8,    value = 410001c

IFC_FTIM3_CS0   Address =ffe1e1cc,    value = 0

IFC_FTIM0_CS1   Address =ffe1e1f0,    value = 0

IFC_FTIM1_CS1   Address =ffe1e1f4,    value = 0

IFC_FTIM2_CS1   Address =ffe1e1f8,    value = 0

IFC_FTIM3_CS1   Address =ffe1e1fc,    value = 0

IFC_FTIM0_CS2   Address =ffe1e220,    value = 0

IFC_FTIM1_CS2   Address =ffe1e224,    value = 0

IFC_FTIM2_CS2   Address =ffe1e228,    value = 0

IFC_FTIM3_CS2   Address =ffe1e22c,    value = 0

IFC_FTIM0_CS3   Address =ffe1e250,    value = e00e000e

IFC_FTIM1_CS3   Address =ffe1e254,    value = e001f00

IFC_FTIM2_CS3   Address =ffe1e258,    value = e00001f

IFC_FTIM3_CS3   Address =ffe1e25c,    value = 0

IFC_RB_STAT  Address =ffe1e400,    value = f0000000

IFC_GCR         Address =ffe1e40c,    value = 2800

IFC_EVTER_STAT         Address =ffe1e418,    value = 0

IFC_GPCM_EVTER_STAT         Address =ffe1f800,    value = 0

IFC_GPCM_ERATTRO         Address =ffe1f824,    value = 0

IFC_GPCM_ERATTR1         Address =ffe1f828,    value = 0

IFC_GPCM_ERATTR2         Address =ffe1f82c,    value = 0

-> d 0xffe1e44c,1,4

NOTE: memory values are displayed in hexadecimal.

0xffe1e440:                             03008000  *                *

value = 0 = 0x0

-> d 0xffe1e40c,1,4

NOTE: memory values are displayed in hexadecimal.

0xffe1e400:                             00002800  *              ( *

value = 0 = 0x0

-> d 0xffee0060,1,4

NOTE: memory values are displayed in hexadecimal.

0xffee0060:  000000c0                             *................*

value = 0 = 0x0

-> d 0xffb00000,1,1

NOTE: memory values are displayed in hexadecimal.

0xffb00000:  ff                                               *................*

value = 0 = 0x0

->

Regards,

Jianwei

[xiejianwei]

Hi Marius，

    Thank you for your enthusiasm to answer my question.

    Now I have at home, and I will test tomorrow , and then give you back the test results.

Regards,

Jianwei