tja1145 spi interface abnormal

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tja1145 spi interface abnormal

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aiweixin
Contributor IV

Hi,

    I debug the tja1145, but read register by spi error.

    When read identification register(0x7E), on oscilloscope, MOSI data is 0xFD 0x00, but MISO data is also 0xFD 0x00, not the expected value 0x70.

image.png

    How to make it work normally?

Best regards!

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aiweixin
Contributor IV

Hi,

    I have solved the issue.

    Read the register 0xFE, and get the expected value 0x70.

aiweixin_0-1698994190798.png

 

    Pay attention to the following points:

1. SPI shift clock idle level is LOW

2. the SPI data shift edge is LEADING

aiweixin_0-1698994057382.png

Best regards!

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Kmenasi
Contributor I

Hello,

We are working on the GW project and using Autosar TC39xx stack and using TJA1145 as CANTRCV. We are unable to control TRCV through SPI. I m facing the Slave response issue and TJA1145 TRCV is not responding to the Transmitted data through the SPI.

Currently, SPI driver clock is traced when CS is low along with Tx/Rx datelines in oscilloscope and supporting image is attached below. The tx is visible on the bus and these commands are related to the TJA1145 TRCV Init. The datawidth is as set as 8bit in the SPI driver configuration.

Kmenasi_2-1708416760698.png

Now the issue seems to be in slave response and unable to control TRCV TJA1145 as expected. During debugging, MISO buffers(Spi Rx buffers) are updated with the same data which is transmitted. SpiOutBuffer and SpiInBuffer updated with same data shown in below image.

Need your help to understand the reasons for not able to get the slave response.

Kmenasi_1-1708416746368.png

The below image is related to external device parameters and highlighted parameters like Time Clk2Cs, Trailing time values are configured based on dynamic characteristics mentioned in TJA1145 datasheet and need clarity on values to be set for these parameters.

Kmenasi_0-1708416730979.png

 

If any further inputs required please let us know. Please share reference cfg files if any to verify the cfg files of CANTRCV and SPI module in our setup.

Best Regards.

 

.

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1,054 Views
aiweixin
Contributor IV

Hi,

    I have solved the issue.

    Read the register 0xFE, and get the expected value 0x70.

aiweixin_0-1698994190798.png

 

    Pay attention to the following points:

1. SPI shift clock idle level is LOW

2. the SPI data shift edge is LEADING

aiweixin_0-1698994057382.png

Best regards!

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