Who can give me some explain

[CaoJason]

Hello:

     Who can give me some explain about this:lis r29,0xfff00000@h.I cann't know well about 0xfff00000@h. also the 0xfff00000@l

[CrasyCat]

Hello

This is explained in the {Install}\Help\PDF\Assembler Reference.pdf (Where {Install} refers to your CodeWarrior installation directory).

Take a look at chapter "Assembly Language Syntax" section "Symbols" -> "Labels".

There is a table there called "Relocatable label expressions", which explains all this.

I hope this helps.

CrasyCat

[CaoJason]

Thanks Cat.

I get it.

Also can you give me some file to explain the details about MPC564EVB link files:such as MPC564EVB_RAM.lcf

MEMORY {
 ram : org = 0xFFF00000
 rom : org = 0xFFD00000
 
// ram : org = 0x00C02000
// rom : org = 0xFFF00000 // desired ROM address
}
 

FORCEACTIVE { gInterruptVectorTable, __reset, __ext_int, __decr, __machine_check }

SECTIONS {

// GROUP : { .intvec : {}
// } > vectors

 GROUP : {
  .reset : {}
  .intvec : {}
  .init : {}
  .text (TEXT) : {}
  .rodata (CONST) : {
   *(.rdata)
   *(.rodata)
  }
  .ctors : {}
  .dtors : {}
  extab : {}
  extabindex : {}
 } > ram  
// } > rom  
 
 GROUP : {
  .data : {}
  .sdata : {}
  .sbss : {}
  .sdata2 : {}
  .sbss2 : {}
  .bss : {}
  .PPC.EMB.sdata0 : {}
  .PPC.EMB.sbss0 : {}  
 } > ram

 // The dummy section is just a placeholder.  The linker automatically
 // generates an address for it in the ROM image, which tells us
 // where the end of the ROM image is.

 .dummy ALIGN(64): {}
 
}

Thanks and best regards!

Jason

[CrasyCat]

Hello

Sorry but what is the question here?

If you are looking for some documentation about linker command file syntax, look in

{Install}\Help\PDF\Power Arch Build Tools Reference.pdf. There is a chapter "Linker" in there, with a whole section "Linker Command File syntax" explaining the syntax of the .lcf file.

I would recommend reading the whole chapter as the sections before provides some good set of information as well.

If that was not the question, can you please be more specific.

CrasyCat

[CaoJason]

Hi cat:

   I have another questions :

         1).the MPC564 have BR0~BR3 and OR0~OR3 registers.What's usage about these registers?

         2). Is the address of internal RAM and  onboard(exterior) RAM,and internal FLash and onboard(exterior) Flash fixed,that's defined by vendor(the address of which is given out in Reference Manual),or it can programmed by value in the BR0~BR3 and OR0~OR3?

Sorry,Cat ,I ask many questions in one tittle,do I need to new another topic?

Cao Jason

Message Edited by CaoJason on 2008-09-16 11:35 AM

[CrasyCat]

Hello

These are configuration registers that are described in the "MPC561/MPC563 Reference Manual".

Take a look at section 10 memory Controller there.

The reference manual can be downloaded from the Freescale  Web site,

CrasyCat

[CaoJason]

sorry,Cat,I have read though this chapter,but I still have these doubt

[CrasyCat]

Hello

I am not a hardware person, so I do not have much more information on that.

I will let someone with hardware knowledge answer that.

Alternatively you can submit a service request for that.

Click here to submit a service request.

CrasyCat

[CaoJason]

Thanks Cat,I'm waiting

[CaoJason]

Hi Cat:

    Thanks,I have understood the link file.

Cao　Jason