Hello @nxp ,
I’m using the SB0401 Single-Channel ABS module IC with an NXP S32K31xEVB-Q48 MCU as the SPI master. I transmit the monitoring/module data once every 10 ms, but the SB0401 monitoring module appears to reset/restart repeatedly (about once every 50 ms). Along with this, my SPI “error count” increases on every SPI transfer.
Below are the setup and my specific questions.
HW/SW setup
MCU (SPI Master): S32K31xEVB-Q48 (S32K31x family)
Device: SB0401 (Single-Channel ABS module IC)
Interface: SPI (LPSPI) (DMA based transfers)
Periodic transmission: every 10 ms
Observed issue: SB0401 monitoring module reset/restart every ~50 ms (see attached logs)
Observed behavior
The error counter increments for every SPI byte/word transfer.
I read AR (seed) from SB0401 message 18 and calculate MR based on that AR.
Despite sending frames periodically, the SB0401 monitoring module resets/restarts.
Questions
MR calculation vs AR (Message 18)
My error count increases on every SPI transfer.
I calculate MR using the AR value received from SB0401 message 18.
Is it expected that an error counter would increment on every transfer in this condition, or does it indicate MR/AR logic is incorrect?
Please confirm the correct MR computation flow/timing relative to AR (message 18) and any common pitfalls (e.g., using stale AR, wrong byte/bit extraction, timing window, counter alignment).
ACK position when writing Message 0
If I write data into Message 0 at TxBuf[0], where should I check the acknowledgement?
Example: For a write in TxBuf[0], does the ACK appear in RxBuf[0] (same word) or in RxBuf[1] (next word)?
If there is a defined “ACK occurs in the following SPI word/frame” rule, please share the exact mapping.
Reference SW / CDD driver
Is there any reference CDD / example driver for SB0401 (C source or AUTOSAR-style CDD integration) that can be shared for guidance?
If not shareable, can you recommend the official SB0401 software package / app note / reference implementation details to follow?
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