SC16IS752 IRQ Pull-Up Resistor value

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SC16IS752 IRQ Pull-Up Resistor value

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981 次查看
timbeyer
Contributor I

In the data sheet for SC16IS752 (and even SC16IS750) the IRQ Pull-Up Resistor value is recommended 1 kOhm for 3.3 V supply. What is the cause ? What will occur with a pullup as high as 33 kOhm ? There is no value given for the leakage current (for GPIO it's 1 µA, for SPI it's 10 µA).

We design a low power circuit with a quite long interrupt response time and would not spend 3.3 mA over several seconds when the rest of the circuit runs on 2 mA.

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JozefKozon
NXP TechSupport
NXP TechSupport

Dear Tim,

Why 1 kΩ is recommended?

  1. Fast rise time for IRQ signal
    The IRQ pin is an open-drain output, so the pull-up resistor determines how quickly the line goes high after the device releases it.

    • With 1 kΩ at 3.3 V, the current is about 3.3 mA when the pin is low, which ensures a strong pull-up and a fast transition when released.
    • This is important because IRQ signals often need to meet timing specs for SPI/I²C or interrupt controllers.
  2. Noise immunity
    A strong pull-up reduces susceptibility to noise and ensures the voltage reaches a valid logic high quickly, even with some parasitic capacitance on the line.

What happens with 33 kΩ?

  • Rise time increases significantly because the RC time constant grows: τ=R×C\tau = R \times Cτ=R×C If the line has, say, 50 pF of capacitance:

    • With 1 kΩ: τ=1,000×50pF=50ns\tau = 1{,}000 \times 50 \text{pF} = 50 \text{ns}τ=1,000×50pF=50ns
    • With 33 kΩ: τ=33,000×50pF=1.65µs\tau = 33{,}000 \times 50 \text{pF} = 1.65 \text{µs}τ=33,000×50pF=1.65µs That’s still fast for many systems, but if your interrupt latency is long and the MCU samples asynchronously, it might not matter much.
  • Logic level stability: With higher resistance, leakage currents (up to 10 µA for SPI pins) could cause noticeable voltage drop. The IRQ might only reach ~3.0 V instead of 3.3 V, which is usually okay but could be marginal in noisy environments.

 

  • If your interrupt response time is in milliseconds and you can tolerate slower rise times, 33 kΩ is likely fine.
  • Just ensure:
    • Total bus capacitance isn’t huge.
    • Leakage currents don’t pull the line below VIH (usually >2 V for 3.3 V logic).

With Best Regards,

Jozef

 

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963 次查看
JozefKozon
NXP TechSupport
NXP TechSupport

Dear Tim,

Why 1 kΩ is recommended?

  1. Fast rise time for IRQ signal
    The IRQ pin is an open-drain output, so the pull-up resistor determines how quickly the line goes high after the device releases it.

    • With 1 kΩ at 3.3 V, the current is about 3.3 mA when the pin is low, which ensures a strong pull-up and a fast transition when released.
    • This is important because IRQ signals often need to meet timing specs for SPI/I²C or interrupt controllers.
  2. Noise immunity
    A strong pull-up reduces susceptibility to noise and ensures the voltage reaches a valid logic high quickly, even with some parasitic capacitance on the line.

What happens with 33 kΩ?

  • Rise time increases significantly because the RC time constant grows: τ=R×C\tau = R \times Cτ=R×C If the line has, say, 50 pF of capacitance:

    • With 1 kΩ: τ=1,000×50pF=50ns\tau = 1{,}000 \times 50 \text{pF} = 50 \text{ns}τ=1,000×50pF=50ns
    • With 33 kΩ: τ=33,000×50pF=1.65µs\tau = 33{,}000 \times 50 \text{pF} = 1.65 \text{µs}τ=33,000×50pF=1.65µs That’s still fast for many systems, but if your interrupt latency is long and the MCU samples asynchronously, it might not matter much.
  • Logic level stability: With higher resistance, leakage currents (up to 10 µA for SPI pins) could cause noticeable voltage drop. The IRQ might only reach ~3.0 V instead of 3.3 V, which is usually okay but could be marginal in noisy environments.

 

  • If your interrupt response time is in milliseconds and you can tolerate slower rise times, 33 kΩ is likely fine.
  • Just ensure:
    • Total bus capacitance isn’t huge.
    • Leakage currents don’t pull the line below VIH (usually >2 V for 3.3 V logic).

With Best Regards,

Jozef

 

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回复
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