PIN assignment: EVB FRDM-STBA-A8964

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PIN assignment: EVB FRDM-STBA-A8964

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Tania_VS
Contributor III

Hi NXP team,

I'm trying to connect the FRDM-STBA-A8964 with a Nordic EVB (nrf9160dk with SPI). I can see all signals in the oscilloscope (CLK, CS, MOSI) but MISO is at high impedance (always high/reading 0xFF in SPI receiver).

uint8_t txBuf[2] = {0x80 | 0x13, 0x00};
uint8_t rxBuf[2];

 

This is my connection:

Tania_VS_0-1698688544636.png

Do you have any idea why this is happening?

Thank you in advance.

Best regards,

Tania

 

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1 Solution
22,416 Views
JozefKozon
NXP TechSupport
NXP TechSupport

Hi Tania,

with the INTF_SEL pin configuration shouldn't be a problem. If you switch the SW2 for SPI interface, the INTF_SEL is connected to VDD through a 10k pull-up resistor. But there is no harm to bring the VDD directly to INTF_SEL pin. 

JozefKozon_0-1699597104967.png

Please remove the jumpers from the J7, J8 and J9 headers. 

JozefKozon_1-1699597223509.png

Please remove the R3, R1 and R4 pull-up resistors. They are not necessary for the SPI interface if your MCU have push-pull inputs/outputs pins. They are needed for I2C interface only. 

JozefKozon_2-1699598001906.png

Please send a read command once again, now with the correct CPOL=0 and CPHA=0 configuration.

Please send 1001 0011 0000 0000 0000 0000. Please share a scope of the SPI pins. 

With Best Regards,

Jozef

 

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22,662 Views
JozefKozon
NXP TechSupport
NXP TechSupport

Hi Tania,

please refer to the section 13.1 in the FXLS8964AF datasheet. For SPI writing the MISO pin is always high-impedance. Please try to read WHO_AM_I register.

JozefKozon_0-1698739725316.png

Please share the SPI scopes to check if you have set correct SPI mode in your MCU.

With Best Regards,

Jozef

 

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22,632 Views
Tania_VS
Contributor III

Hi JozefKozon,

Writing WHO_AM_I register (address 0x13):

uint8_t txBuf[2] = {0x00 | 0x13, 0x00};
uint8_t rxBuf[2];
 

Reading WHO_AM_I register (address 0x13):

uint8_t txBuf[2] = {0x80 | 0x13, 0x00};
uint8_t rxBuf[2];
 

I'm waiting to receive ID 0x84 but it is just a high impedance.

 
 

Thank you in advance.

Best regards,

Tania Velazquez

 

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22,629 Views
Tania_VS
Contributor III

Please find attached pictures for "writing" and "reading" modes.

Writing:

Tania_VS_1-1698958127092.jpeg

 

Reading:

Tania_VS_0-1698958099318.jpeg

 

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22,445 Views
JozefKozon
NXP TechSupport
NXP TechSupport

Hi Tania,

your connection is correct. Thank you for the scopes. Your SPI settings are correct (CPOL=0, CPHA=0). Please double check the SW1 pin. Is it in position 2-3. From your printscreen it is, but please confirm. Please disconnect the MISO pin from your MCU and try to read the WHO_AM_I register. Connect the oscilloscope probe on the MISO pin. To check if your MCU is not holding the MISO pin constantly high. 

With Best Regards,

Jozef

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22,614 Views
JozefKozon
NXP TechSupport
NXP TechSupport

Hi Tania,

thank you for the scopes. I see at least one issue with it. Please refer to the section 13. in the FXLS8964 datasheet. You need to set the SPI mode to 0 in your MCU. The CPOL=0 and CPHA=0. In your case the CPOL is set to 1. High on Idle. 

JozefKozon_1-1698990760756.pngJozefKozon_2-1698990806116.png

JozefKozon_3-1698990877997.png

Further, when you will have the CPOL set to 0, you need set the CPHA to 0=>data sampled on CLK rising edge. 

JozefKozon_4-1698990964011.pngJozefKozon_5-1698991023547.png

 

With Best Regards,

Jozef

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22,523 Views
Tania_VS
Contributor III

Hi JozefKozon,

I had this result.

Tania_VS_0-1699319712521.jpeg

 

Regards,

Tania

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22,481 Views
JozefKozon
NXP TechSupport
NXP TechSupport

Hi Tania,

thank you for the updated scope. I see you have fixed the CPOL to 0. Can you please share more focused scope? To see when the MOSI and MISO data are sampled and shifted? The data should be shifted on SCLK falling edge and sampled on SCLK rising edge. CPHA should be 0. 

JozefKozon_1-1699336264110.png

Are you still trying to read the WHO_AM_I register?

With Best Regards,

Jozef

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22,456 Views
Tania_VS
Contributor III

Hi JozefKozon,

Thank you for your help. Please fid attached the oscilloscope captures.

Can you tell me if my connection is ok? I was reading the datasheet and I have added the INTF_SEL pin to high (VDD) (for SPI) and I have the problem still. In previous versions it did not take this pin into account.

Regards,

Tania

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22,410 Views
Tania_VS
Contributor III

Hi JozefKozon,

I have used the EVK with I2C and had no problems as with SPI. Do you have any recommendations? I don't think it is SPI protocol because SPI looks good.

Regards,

Tania

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22,417 Views
JozefKozon
NXP TechSupport
NXP TechSupport

Hi Tania,

with the INTF_SEL pin configuration shouldn't be a problem. If you switch the SW2 for SPI interface, the INTF_SEL is connected to VDD through a 10k pull-up resistor. But there is no harm to bring the VDD directly to INTF_SEL pin. 

JozefKozon_0-1699597104967.png

Please remove the jumpers from the J7, J8 and J9 headers. 

JozefKozon_1-1699597223509.png

Please remove the R3, R1 and R4 pull-up resistors. They are not necessary for the SPI interface if your MCU have push-pull inputs/outputs pins. They are needed for I2C interface only. 

JozefKozon_2-1699598001906.png

Please send a read command once again, now with the correct CPOL=0 and CPHA=0 configuration.

Please send 1001 0011 0000 0000 0000 0000. Please share a scope of the SPI pins. 

With Best Regards,

Jozef

 

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22,328 Views
Tania_VS
Contributor III

Hi JozefKozon,

Solved, it was a pin.

Thank you for your help.

Best regards,

Tania

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22,520 Views
Tania_VS
Contributor III

Is the configuration correct?

Connection:

Tania_VS_0-1699319797577.png

 

 

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