given the absence of interrupts, a certainty that the time base is enabled, a certainty that the timebase is going to stay enabled, and an assumption that there is no overflow of TBL, or that in any case you know how to make sure TBU/TBL are read in a consistent manner:
read the time base registers at the start of the code block, perhaps into a U64 called start_time
execute the code block
read the time regbase registers agin, into a U64 called finish_time
actual code execution time = (finish_time - start-time) / system_clock_freq - overhead_time
overhead time is the time you lose if the code block is <nothing>
