FlexIO, various dumb questions (trigger polarity and timena)

[Catosh]

Hello,

I got some very dumb questions about flexIo. Let's suppose I am using NXP's sdk, and let's talk about timers.

.trgpol is the polarity of the trigger. Let's suppose I set the polarity to kFlexioTimerTriggerPolarityActiveLow.
When I set .timena = kFlexioTimerEnableOnTriggerHigh, (or kFlexioTimerEnableOnTriggerRisingEdge)
does it mean that the Active Low condition on the trigger will cause a logic high condition?
Or kFlexioTimerTriggerPolarityActiveLow + kFlexioTimerEnableOnTriggerRisingEdge implies that I'll have a start condition for that timer only when its trigger will deactivate?

I'm asking because from the datasheet is not really clear.

B.R

L

[Catosh]

I was taking a look to my post on my NXP profile and this *old* thread came up.
Maybe I can share some of my understandings with the community.  It may be obvious for many of you,but wasn't for me!
TIMER config:

.trgpol = kFlexioTimerTriggerPolarityActiveLow/High

This is effectively the "electrical" behavior of the trigger.

.timena = kFlexioTimerEnableOnTriggerRisingEdge(And related conditions)

This is related to the trigger STATUS: if  trgpol is activeLow, the timer will be enabled (TRIGGERED) when the trigger input switches to low. 
Anyway, from the STATUS perspective this will be a rising edge of the condition trigger active.

.pincfg = kFlexioPinConfigOutput,

Ok, someone could have noticed that there is no kFlexioPinConfigInput in the type flexio_pin_config_t.
It's implicit input if kFlexioPinConfigOutputDisabled is selected?
Here come the tricky part. It's an input pin from the FLEXIO perspective, but not an input from an external GPIO.
You can figure it out selecting a GPIO mapped on the flexio header, providing an input PWM signal and using the timer as a divider. It will not count.
If a timer needs to be fed by an exernal input, you should use an EXTERNAL trigger source

.trgsrc = kFlexioTimerTriggerSourceExternal,

and configure the alternative EXTRG_IN for your pin (in my K-device the pin is PTC0, on FLEXIO_D12).

Furthermore, if you want to use DMA  to transmit data, you should set

.trgsel = FLEXIO_HAL_TIMER_TRIGGER_SEL_SHIFTnSTAT(1),

.timena = kFlexioTimerEnableOnTriggerHigh,

it's vital to configure timena on LEVEL instead of EDGE, or it will not trigger the DMA transition.

This is what I found with trial and error (and the help of a very patient FAE). NXP datasheet about flexIO unfortunately isn't very clear.
Furthermore, maybe that what I found out is not totally correct (maybe some concurrent peripheral configuration or too many timer configs lead to strange behaviour of the flexIO, or maybe I messed up some register..) , so maybe someone at NXP will come here and correct what I wrote. It would be very appreciated from my side.

That said, i really like the flexIO peripheral - it's like having some FPGAs blocks on an MCU.
I mean, timers, shift register and LUTs are the building blocks of everything.

Best regards,

L.