Dual RISC processor in MSC8156

[lpeng]

Hi all,

The MSC8156 Block Diagram in document "MSC8156 Product Brief" show that MAPLE-B has a Dual RISC Engine, but the block Diagram in document "MSC8156 Data Sheet" show that there is no Dual RISC Engine in MAPLE-B and there are Dual RISC Processors in QUICC Engine Subsystem.

I want to ask whether both of their have Dual RISC processor. Thanks.

[starcoreDSP · Accepted solution]

Based on the 8156 RM, both MAPLE-B and QUICC Engine have Dual RISC Engine.  

In 8156 PB, on page 11, it says  

The QUICC Engine subsystem includes dual RISC processors and 48-Kbyte multi-master RAM
to handle the Ethernet and SPI interfaces, thus off loading the tasks from the cores. The three
communication controllers support

[lpeng]

Ok, Thank you.