Basic simulation of NXP LDMOS device in Keysight ADS

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Basic simulation of NXP LDMOS device in Keysight ADS

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jmsebastian
Contributor II

Hi,

I am doing some basic simulation of AFT27S010N transistor in ADS and I have some questions.

First, I am simulating IV curves.  This is the schematic:

fet_curve_tracer_sch.JPG

With this schematic, after launching simulation, I get the following warning:

warning_mutual_inductance.JPG

Is there something wrong in my schematic? How can I avoid such warning?

 

Ignoring this warning, I go on with simulation.  IV curves seem to be ok.  For Vdc = 28v and Vgs = 1.9v, I get Ids = 112mA, which is near the 90mA used along the datasheet.

fet_curve_tracer_sim.JPG

After that, I use another schematic to get S(2,1).  In this schematic I set Vds = 28v and Vgs = 1.9v.

analyzer_sch.JPG

The values for S(2,1) are just a few dB, far from the about 20 dB stated in the datasheet.

analyzer_sim.JPG

Is there something wrong with the setup of my simulation?

Any advice will be very welcome.

I have attached the workspace I am using.  

 

 

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diazmarin09
NXP TechSupport
NXP TechSupport

Hello Sebastian,

I hope all is great with you.  

In this case, I would like to recommend the following tutorials from the Keysight Design Software channel below:

How to Design an RF Power Amplifier,The Basics, Class A,AB and B

How to Design a Stable High Frequency Amplifier

GaN transistor amplifier has nothing special in design except of gate bias sequencing.

I hope this information helps.

Regards,

David

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