Allowable void% on MRF1K50N solder joint?

[joshterry]

We are trying to attach our MRF1K50N transistors to copper carriers using reflow soldering and wanted to know if you had a recommended or max allowable void% of the joint, so we know how much we need to improve our process and at what point we can call it successful.

[LPP]

Our general safe limit for maximum solder voiding specification is 25% total area voided max and no single void greater than 5%.

For thermal strained applications, for a decent solder mount void requirement under the flange is 40 mils "approximately round" max void area and no more than 15% total voided area. 40 mils can be replaced with a 3% max single void area and max 15% overall voiding.

Have a great day,
Pavel

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