Booting from SD2 on i.mx6ull/ulz board

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Booting from SD2 on i.mx6ull/ulz board

278 Views
Contributor I

Hi,

We have a custom 6ulz based board that was built with the 6ull EVK as reference. We are able to load u-boot onto it using uuu in Serial download mode but not able to load the demo OS from the SD2 slot.

On the EVK, we noticed that when we put the board in (Serial Downloader SW602 set to 10) mode and load a u-boot image using uuu tool, it loads u-boot onto memory and then that proceeds to start booting the kernel from the SD card no matter what boot mode we select on SW601 (we tried the SD mode 0010 as well as any other configuration). 

When we tried to do the same on our board, it does not work and outputs the following:

pastedImage_1.png

Are we supposed to add the SD2 snippet onto mx6ullevk.c file? We added the following code on there hoping that would initialize the SD2 slot. It was a snippet from the mx6ul board file but we did not enable the EMMC rework part of the conditional statement and just had the usdhc2_pads, usdhc2_cd_pad and dat3 apd defined and called them with iomux_v3_setup_multiple_pads() fx under board_mmc_getcd() and board_mmc_init() functions:

static iomux_v3_cfg_t const usdhc2_pads[] = {
    MX6_PAD_NAND_RE_B__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
    MX6_PAD_NAND_WE_B__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
    MX6_PAD_NAND_DATA00__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
    MX6_PAD_NAND_DATA01__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
    MX6_PAD_NAND_DATA02__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
    MX6_PAD_NAND_DATA03__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
};

/*
 * The evk board uses DAT3 to detect CD card plugin,
 * in u-boot we mux the pin to GPIO when doing board_mmc_getcd.
 */
static iomux_v3_cfg_t const usdhc2_cd_pad =
    MX6_PAD_NAND_DATA03__GPIO4_IO05 | MUX_PAD_CTRL(USDHC_DAT3_CD_PAD_CTRL);

static iomux_v3_cfg_t const usdhc2_dat3_pad =
    MX6_PAD_NAND_DATA03__USDHC2_DATA3 |
    MUX_PAD_CTRL(USDHC_DAT3_CD_PAD_CTRL);

#ifdef CONFIG_FSL_ESDHC
static struct fsl_esdhc_cfg usdhc_cfg[2] = {
    {USDHC1_BASE_ADDR, 04},
#if defined(CONFIG_MX6UL_14X14_EVK_EMMC_REWORK)
    {USDHC2_BASE_ADDR, 08},
#else
    {USDHC2_BASE_ADDR, 04},
#endif
};

#define USDHC1_CD_GPIO IMX_GPIO_NR(119)
#define USDHC1_PWR_GPIO IMX_GPIO_NR(19)
#define USDHC2_CD_GPIO IMX_GPIO_NR(45)
#define USDHC2_PWR_GPIO IMX_GPIO_NR(410)

int board_mmc_getcd(struct mmc *mmc)
{
    struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
    int ret = 0;

    switch (cfg->esdhc_base)
    {
    case USDHC1_BASE_ADDR:
        ret = !gpio_get_value(USDHC1_CD_GPIO);
        break;
    case USDHC2_BASE_ADDR:
#if defined(CONFIG_MX6UL_14X14_EVK_EMMC_REWORK)
        ret = 1;
#else
        imx_iomux_v3_setup_pad(usdhc2_cd_pad);
        gpio_direction_input(USDHC2_CD_GPIO);

        /*
         * Since it is the DAT3 pin, this pin is pulled to
         * low voltage if no card
         */
        ret = gpio_get_value(USDHC2_CD_GPIO);

        imx_iomux_v3_setup_pad(usdhc2_dat3_pad);
#endif
        break;
    }

    return ret;
}

int board_mmc_init(bd_t *bis)
{
#ifdef CONFIG_SPL_BUILD
#if defined(CONFIG_MX6UL_14X14_EVK_EMMC_REWORK)
    imx_iomux_v3_setup_multiple_pads(usdhc2_emmc_pads,
                                     ARRAY_SIZE(usdhc2_emmc_pads));
#else
    imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
#endif
    gpio_direction_output(USDHC2_PWR_GPIO, 0);
    udelay(500);
    gpio_direction_output(USDHC2_PWR_GPIO, 1);
    usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
    return fsl_esdhc_initialize(bis, &usdhc_cfg[1]);
#else
    int i, ret;

    /*
     * According to the board_mmc_init() the following map is done:
     * (U-Boot device node)    (Physical Port)
     * mmc0                    USDHC1
     * mmc1                    USDHC2
     */
    for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++)
    {
        switch (i)
        {
        case 0:
            // imx_iomux_v3_setup_multiple_pads(
            //     usdhc1_pads, ARRAY_SIZE(usdhc1_pads));
            // gpio_direction_input(USDHC1_CD_GPIO);
            // usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);

            // gpio_direction_output(USDHC1_PWR_GPIO, 0);
            udelay(500);
            // gpio_direction_output(USDHC1_PWR_GPIO, 1);
            break;
        case 1:
#if defined(CONFIG_MX6UL_14X14_EVK_EMMC_REWORK)
            imx_iomux_v3_setup_multiple_pads(
                usdhc2_emmc_pads, ARRAY_SIZE(usdhc2_emmc_pads));
#else
            imx_iomux_v3_setup_multiple_pads(
                usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
#endif
            gpio_direction_output(USDHC2_PWR_GPIO, 0);
            udelay(500);
            gpio_direction_output(USDHC2_PWR_GPIO, 1);
            usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
            break;
        default:
            printf("Warning: you configured more USDHC controllers (%d) than supported by the board\n", i + 1);
            return -EINVAL;
        }

        ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
        if (ret)
        {
            printf("Warning: failed to initialize mmc dev %d\n", i);
            return ret;
        }
    }
#endif
    return 0;
}
#endif

Any help in clarifying how to get the SD2 slot to be recognized for booting OS would be greatly appreciated.

Thanks,

Angshu

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10 Replies

223 Views
Contributor I

Hi Igor,

We realized that the default CD_B pad for SD2  is being used for i2c1_SDA in our case.  Can we use the DATA03 pin of USDHC2 to set that as the CD pin? Our guess is that because the default CD_B pin is set to high in our case, it is not detecting the card on the SD2 slot.

 

Any suggestions on re-routing another pad for Card detection purposes would be helpful.


Thanks,

 

Angshu

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218 Views
NXP TechSupport
NXP TechSupport

Hi Angshu

 

in linux one can refer to sect.3.3.6 Device Tree Binding

i.MX Linux Reference Manual​

If it is used for boot, sect.Table 8-18. SD/MMC IOMUX pin configuration

i.MX 6ULZ Applications Processor Reference Manual

 

Best regards
igor

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194 Views
Contributor I

Hi Igor,

We ran the DDR calibration sucessfully and updated the dcd values.  However in u-boot we still get the following error on debug mode when trying to boot OS from micro SD card:

clock is disabled (0Hz)
clock is enabled (400000Hz)
Card did not respond to voltage select!
mmc_blk_probe: mmc_init() failed (err=-95)
*** Warning - No block device, using default environment

 

if we load the same u-boot.imx file on the EVK board via SDP mode with the SD card present, it will start booting the OS without a problem as shown in the snippet below (it enables the 50Mhz SD CLK and proceeds to boot it seems).

clock is disabled (0Hz)
clock is enabled (400000Hz)
clock is enabled (50000000Hz)
miss: start 0, count 1
blk_find_device: if_type=6, devnum=1: usdhc@02190000.blk, 6, 0
blk_find_device: if_type=6, devnum=1: usdhc@02194000.blk, 6, 1
fill: start 0, count 1

The EVK schematics and ours is identical for the micro SD slot, hence no iomux required to reroute any pins. Do you have any other suggestions? U-boot seems to be running just fine when loaded via SDP but cannot get mmc device to come up properly.  This is same across 3 of our boards.

 

Thanks,

 

Angshu

 

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NXP TechSupport
NXP TechSupport

Hi Angshu

 

had you checked sd signals with oscilloscope, can provide any logs.

 

Best regards
igor

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175 Views
Contributor I

Hi Igor,

On the scope, the SD CLK pin has its value flipped when boot mode is changed. This seemed to indicate that the CPU is actually able to change that pin's value and that the signal path is good. However when we try to load u-boot and then boot from microSD, it does nothing at all.

Are there any specific configuration on u-boot's source or dts where we need to further enable sd clk for the 6ulz chip versus the EVK which has the 6ull chip?  Are there any differences there?

The log output I pasted on my previous message shows the non-working and working (EVK) examples of uboot debug output, respectively.

 

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NXP TechSupport
NXP TechSupport

there are no specific for ulz configuration, from log "card did not respond to voltage

select" - this is definitely hardware issue. Suggest to check signals with oscilloscope

and try other card. Also just for test one can try to prolong POR signal up to 1 sec.

 

Best regards
igor

 

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157 Views
Contributor I

Hi Igor,

We will further investigate the card slot. We have tried the same card on the EVK and it worked. Can you recommend a particular JTAG debugger in case we need to step through in JTAG?

Will also try and prolong the POR signal to 1 sec.

Thanks,

Angshu

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152 Views
NXP TechSupport
NXP TechSupport

Hi Angshu

 

in general any debugger can be used, RealView-ICE, JLINK.

 

Best regards
igor

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150 Views
Contributor I

Thank you Igor. Will let you know if we resolve it or have any questions. Appreciate it.

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255 Views
NXP TechSupport
NXP TechSupport

Hi Angshu

 

first for new board it is necessary to run ddr test

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-6-7-DDR-Stress-Test-Tool/ta-p/11082...

then find new ddr calibration coefficients and put them in uboot dcd header, rebuild image

https://source.codeaurora.org/external/imx/uboot-imx/tree/board/freescale/mx6ullevk/imximage.cfg?h=i...

 

Best regards
igor

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