PN7462 SPI Master issue

[jean-pierrefort]

Hi,

I am trying to communicate with an external SPI slave from the PN7462 firmware.

I use the NXP librairie (PN7462AUPspPackageFull-v04_06_00) and check the resulting signals with an oscilloscope.

Whatever the data I send, the physical output is the same!

Here is the code:

#define PH_SPI_SLAVE_FLASH 0
#define PH_SPIM_MSB_FIRST 1
#define PH_SPIM_BAUD_RATE 0 // 1.0 MHz
#define PH_SPIM_NSSPULSE 0
#define PH_SPIM_NSSPOL 0
#define PH_SPIM_INIT_CRC 0
#define PH_SPIM_APPEND_CRC 0
#define PH_SPIM_CRC_INIT 0
#define PH_SPIM_CRC_OFFSET 0
phStatus_t spi_test()
{
     phStatus_t status;
     uint8_t buf[4] = { 0xFF, 0x00, 0xFF, 0x00 };

     phhalSPIM_Configure(PH_SPI_SLAVE_FLASH,
                                        PH_SPIM_MSB_FIRST,
                                        E_SPIM_MODE0,
                                        PH_SPIM_BAUD_RATE,
                                        PH_SPIM_NSSPULSE,
                                        PH_SPIM_NSSPOL);

     status = phhalSPIM_Transmit(PH_SPI_SLAVE_FLASH,
                                        PH_SPIM_INIT_CRC,
                                        PH_SPIM_APPEND_CRC,
                                        PH_SPIM_CRC_INIT,
                                        4,
                                        buf,
                                        PH_SPIM_CRC_OFFSET);
     return status;
}

I also join a screenshot of the resulting waveform (in red SCLK, in blue MOSI).

I have tried many other configurations (parameters, values, etc) without success.

I wonder what I am missing!

Any help would be appreciated!

Thanks in advance!

-- 

Jean-Pierre

[Eric84]

I encountered the same issue while using the PN7462 SPI Master to control a slave device. I checked the datasheet and API documentation, but there was no explanation until I saw your post. Defining the data in the heap solved the problem, which is really strange. I consulted Gemini, and it suggested that the SPIM might be using DMA to send data, and DMA cannot directly access stack data. However, this is just a guess and cannot be confirmed.

[sanath_rai]

Hello Jean,

i am able to transmit multiple data via MOSI to the slave device using the HAL driver function

but my issue is with Receiving data via MISO .

there is HAL function for it , but my application needs it in interrupt form, that is when i receive data  ISR for receive data should be called.

There is this  concept of water level interrupt which is bit confusing .Can any one help me to figure out the water level interrupts ? how can it be used for receive SPI data?

or

Are there any other way to receive SPI data via interrupts?

Have you received data in via interrupt ?

REGARDS,

sanath rai

[onlineit]

Hi Jean-Pierre,

        Thanks very much!

         Which pin of PN7462AUHN does the function of phhalSPIM_ChipSelect() use?

SPIM_SSN(pin-60th) or GPIO ?

[jean-pierrefort]

Hi xia s,

I just checked the schematic and it is the SPIM_SSN pin (pin 60).

Regards

[onlineit]

Hi Jean-Pierre,

          The NSS of SPI Master is automatic. It can output the chip selection signal when reading and writing without any other control. Can you provide the phhalSPIM_ChipSelect function?

Regards

[jean-pierrefort]

Here is the code I have for phhalSPIM_ChipSelect.

I believe it comes from the NXP lib (file phhalSPIM.c v04.09.00).

phStatus_t phhalSPIM_ChipSelect( uint8_t bSlaveSelect, uint8_t bOn)
{
#if PHFL_PARAM_CHECK >= PH_PARAM_CHECK_VERBOSE
        /* Check for the maximum allowed baud rate value */
        if (bSlaveSelect >= PHHAL_SPIM_MAX_NO_SLAVES)
        {
            return (PH_ERR_INVALID_PARAMETER| PH_COMP_SPIM);
        }
#endif
    if(bOn)
    {
        sSlaveConfiguration[bSlaveSelect].dwConfigReg &= ~(1 << SPIM_CONFIG_REG_NSS_VAL_POS);
    }
    else
    {
        sSlaveConfiguration[bSlaveSelect].dwConfigReg |= (1 << SPIM_CONFIG_REG_NSS_VAL_POS);
     PH_REG_SET(SPIM_CONFIG_REG, sSlaveConfiguration[bSlaveSelect].dwConfigReg);
    }
 return PH_ERR_SUCCESS;
}‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

As far as I can remember, the automatic NSS may make the SPI communication fail since we sometimes need to keep the NSS low all along several transmissions (for example, external flash programming).

Observe the signals with an oscilloscope to better understand what is going on.

Regards

[onlineit]

Hi,Jean-Pierre,

       Can you provide a SPIM read-write example?

[jean-pierrefort]

Hi xia s,

Here it is:

3 functions to init the SPI module, write and read data.

PH_NOINIT uint8_t gphDEV_SPI_Hw_Buffer[1024];

uint8_t phDEV_Hw_Spi_Init(void) {
    PH_USER_ASSERT(
            phhalSPIM_Init(PH_DEV_HW_SPIM_TIMEOUT) == PH_ERR_SUCCESS);

    /* SLAVE 0: SPI PERIPHERAL  */
    PH_USER_ASSERT(
            phhalSPIM_Configure(PH_DEV_SPI_SLAVE_PERIPH, PH_DEV_HW_SPIM_MSB_FIRST,
                 E_SPIM_MODE0, PH_DEV_SPI_CLK_1_0_MHZ,
        PH_DEV_HW_SPIM_NSSPULSE, PH_DEV_HW_SPIM_NSSPOL) == PH_ERR_SUCCESS);
    return 0;
}

phStatus_t phDEV_SPI_periph_write (uint8_t *data, int16_t data_length)
{
 phStatus_t status;

 // check length
 if(data_length <= sizeof(gphDEV_SPI_Hw_Buffer))
 {
  // copy cmd to static buffer
  memcpy(gphDEV_SPI_Hw_Buffer, data, data_length);
 }
 else
 {
  return PH_ERR_LENGTH_ERROR;
 }

 phhalSPIM_ChipSelect(PH_DEV_SPI_SLAVE_PERIPH, true);

 // send command
 status = phhalSPIM_Transmit(PH_DEV_SPI_SLAVE_PERIPH,
        PH_DEV_HW_SPIM_INIT_CRC,
        PH_DEV_HW_SPIM_APPEND_CRC,
        PH_DEV_HW_SPIM_CRC_INIT,
        data_length,
        gphDEV_SPI_Hw_Buffer,
        PH_DEV_HW_SPIM_CRC_OFFSET);

 phhalSPIM_ChipSelect(PH_DEV_SPI_SLAVE_PERIPH, false);

 return status;
}

phStatus_t phDEV_SPI_periph_read (uint8_t *data, int16_t data_length)
{
 phStatus_t status;

 // check length
 if(data_length > sizeof(gphDEV_SPI_Hw_Buffer))
 {
  return PH_ERR_LENGTH_ERROR;
 }

 phhalSPIM_ChipSelect(PH_DEV_SPI_SLAVE_PERIPH, true);

 // send command
 status = phhalSPIM_Receive(PH_DEV_SPI_SLAVE_PERIPH,
          PH_DEV_HW_SPIM_INIT_CRC,
          PH_DEV_HW_SPIM_CRC_INIT,
          data_length,
          gphDEV_SPI_Hw_Buffer,
          PH_DEV_HW_SPIM_CRC_OFFSET);

 phhalSPIM_ChipSelect(PH_DEV_SPI_SLAVE_PERIPH, false);

 memcpy(data, gphDEV_SPI_Hw_Buffer, data_length);

 return status;
}‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

Regards

[jean-pierrefort]

I answer this question myself: do not declare the tx buffer on the stack!

-- 

Jean-Pierre