PN7462 I2CM Configuration and EEPROM Communication Example Request

[uday_gowda]

Hi Team,

I am trying to use the PN7462 I2C Master (I2CM) interface to communicate with an external EEPROM (24AA025UID / AT25M02).

My I2CM initialization is as follows:

phStatus_t I2C_Init(void)
{
    phStatus_t status;
    uint8_t bBaudRate;

    bBaudRate = (uint8_t)
        ((PH_EXHIF_HW_CRYSTAL_CLK / 100000UL) -
         PH_EXHIF_HW_CRYSTAL_CLK_MHZ);

    status = phhalI2CM_Init(
                PH_EXHIF_HW_I2CM_TX_FIFO_THRES,
                PH_EXHIF_HW_I2CM_RX_FIFO_THRES,
                PH_EXHIF_HW_I2CM_TIMEOUT,
                PH_EXHIF_HW_I2CM_RETRY_CNT);

    if(status != PH_ERR_SUCCESS)
    {
        return status;
    }

    status = phhalI2CM_Config(
                243,
                0x09,
                E_I2CM_7BIT_ADDR_MODE);

    phHal_Nvic_EnableInterrupt(PH_HAL_NVIC_I2C_MASK);

    return status;
}

I am using phhalI2CM_SlaveCheck(), phhalI2CM_Transmit(), and phhalI2CM_Receive() to access the EEPROM.

Could you please provide:

1. I have initialized I2CM using phhalI2CM_Init() and phhalI2CM_Config(), and enabled the I2C interrupt. However, when I call phhalI2CM_SlaveCheck(), I get a HardFault.

   Could you please share:

   • Any I2CM EEPROM read/write example project for PN7462.
   • The recommended I2CM initialization sequence.
   • Any required PCR/PAD configuration.
   • Any OSAL/Event initialization required before using phhalI2CM_SlaveCheck(), phhalI2CM_Transmit(), and phhalI2CM_Receive().

Currently, transmit and slavecheck results in a HardFault, so I would like to verify that the I2CM initialization and usage sequence is correct.

Thanks,
Uday

[EduardoZamora]

Hello @uday_gowda

Unfortunately, there is no specific demo for I2C EEPROM read/write. I will recommend you referring to PN7462AU_ex_phExHif demo (from latest NFC Reader Library for PN7462) for I2CM initialization and operation.

For I2CM Tx tests, please comment the lines used for GPIO evaluation or sync:

- src/phExHif.c -> around lines 76, 84, 94, 108 (this line is used for reception)

- src/phExHif_Hw.c -> around lines 120, 126, 142 (hardcode bHifInterface), 210 (hardcode bCommChannel to 1)

Also, please consider changing Optimization level to None (-O0).

Regards,
Eduardo.

[uday_gowda]

Hello @EduardoZamora,

Thank you for your response.

I am using the following I2CM initialization and EEPROM read implementation, which works correctly in the PN7462AU_ex_phExHif demo project:

phStatus_t I2C_Init(void)
{
    phStatus_t status;
    uint8_t bBaudRate;

    bBaudRate = (uint8_t)
        ((PH_EXHIF_HW_CRYSTAL_CLK / 100000UL) -
         PH_EXHIF_HW_CRYSTAL_CLK_MHZ);

    status = phhalI2CM_Init(
                PH_EXHIF_HW_I2CM_TX_FIFO_THRES,
                PH_EXHIF_HW_I2CM_RX_FIFO_THRES,
                PH_EXHIF_HW_I2CM_TIMEOUT,
                PH_EXHIF_HW_I2CM_RETRY_CNT);

    if(status != PH_ERR_SUCCESS)
    {
        return status;
    }

    status = phhalI2CM_Config(
                0x40,
                0x09,
                E_I2CM_7BIT_ADDR_MODE);

    return status;
}

#define EEPROM_ADDR      (0x50U)

#define EEPROM_MFG_ADDR  (0xFAU)
#define EEPROM_DEV_ADDR  (0xFBU)
#define EEPROM_UID_ADDR  (0xFCU)

phStatus_t EEPROM_ReadUID(uint8_t uid[4])
{
    return EEPROM_Read(
                EEPROM_UID_ADDR,
                uid,
                4);
}

static phStatus_t EEPROM_Read(uint8_t memAddr,
                              uint8_t *pData,
                              uint16_t length)
{
    phStatus_t status;

    uint32_t txBuf[4];
    uint32_t rxBuf[64] = {0};

    txBuf[0] = memAddr;

    status = phhalI2CM_Transmit(
                EEPROM_ADDR,
                1,
                txBuf);

    if(status != PH_ERR_SUCCESS)
    {
        return status;
    }

    status = phhalI2CM_Receive(
                EEPROM_ADDR,
                length,
                rxBuf);

    if(status != PH_ERR_SUCCESS)
    {
        return status;
    }

    memcpy(pData, (uint8_t *)rxBuf, length);

    return PH_ERR_SUCCESS;
}

This exact code works in the PN7462AU_ex_phExHif demo. However, when integrated into my application and also phExMain example, it causes a HardFault.

Apart from commenting the GPIO evaluation/sync lines and changing the optimization level to -O0, is there any additional configuration required in phExMain and on my application for I2CM operation?

Regards,
Uday Gowda

[EduardoZamora]

Hi,

We will continue the communication in your post PN7462 I2CM configuration - NXP Community.

Regards,
Eduardo.