PN7120, Power Down Sequence

[L33m8]

Hello,

is it possible to connect “Vdd_Pad” “and “Vbat” together (to common 3,3V system supply)? We would fulfill the power up sequence like depicted in (10.6.22, Figure 19) in the datasheet, but not the power down sequence (10.6.3), since the “Vdd_Pad” “and “Vbat” need to be separated (Figure 19). Actually, we have got a battery voltage in our system (3,6v…4.2V) , but using for periphery is not intended. Can you please give me an advice?

Another question regarding application note, Fabian_R recommended AN11755 to me, but it’s related to PN7150, maybe is AN11564 appropriate note for PN7120?

Best Regards

L33M8

[Fabian_R · Accepted solution]

Dear L33M8,

I'm so sorry for the late response, my apologies for this.
As you stated in your post, We also do not recommend Vdd_Pad and Vbat to be together. This might cause strange behavior in your IC. Please try to follow our recommendations in our documents.
The recommendation about the AN11755 was because PN7150 is our most recent PN71 product. Please feel free to use both AN might help you to clarify your product design.

Thank you for your interest in our products.

[L33m8]

Hello Fabian,

Please take a look to an evaluations board UM10878, I see that Vbat and Vdd PAD are connected togheter.

Is that correct? So, i cannot do the same?

Best Regards

[L33m8]

Hello Fabian,

many thanks for that.

Best Regards.

[L33m8]

Hello,

can someone please answer that? I would appreciate that.

Best Regards.