Hi Yvan,
The SPI Chip Select line corresponds to pin SSEL (frame sync select) of the SSP HW block. It is routed to pin 2.
When the IC drives the clock signal, it will also set it to active state before the start of the serial data. When the IC follows the clock signal, the change to active state qualifies for the presence of data.
See for more information in the datasheet, Chapter 8.10, SPI controller; basic examples can be found under <SDK>/docs/firmware.html.
If you have more than two devices on the SPI bus, you cannot simply connect the chip select pins together, but will need to use multiple pins on the main device, one for each follower that is present. Driving those pins falls outside the scope of the SPI driver.
KR,
Dries.