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T1042 LAW vs CCSR Memory Maps

I am trying to understand concept of LAW & CCSR and difference between LAW and CCSR memory maps but could not clarify my view after reading T1040 RM. For example table 2-3 (LAWs memory map) in T1040 RM says that the IFC is mapped at address 0x80000000 whereas table 2-5 (CCSR memory map) says that the IFC is at 0xFF124000.

Can someone clarify which addresses (LAWs or CCSR) are actually used by drivers to access devices.

QorIQ T1 DevicesRe: T1042 LAW vs CCSR Memory Maps

This is a really interesting question, and the distinction you’re pointing out can definitely be confusing at first. From what I’ve learned, drivers typically rely on the CCSR view when interacting with hardware blocks, while LAWs describe how those regions are translated at a higher level. I came across some helpful background while reviewing Montgomery County Court that explained how different mappings can coexist for different access purposes. It might help to think of LAWs as the translation rules and CCSR as the actual register access view used in practice.

Re: T1042 LAW vs CCSR Memory Maps

These are base addresses where respective FCM (Flash Control Machines) controllers use. For example nand use SRAM for buffer and with 0xFF800000 you can reach that.

Re: T1042 LAW vs CCSR Memory Maps

Thanks alexander.yakovlev‌. I have somewhat understood the difference theoratically, but what is mentioned in the following device tree snippet of T1042D4RDB board is that the IFC controller (localbus) is @ 0xFFE124000 (CCSR mem map). While the address translation property 'ranges' mentions the parent addresses from LAW address space (The addresses 0xfe8000000, 0xfff800000, 0xfffdf0000 are set for nor, nand and cpld in u-boot's law.c file)

localbus@ffe124000 {
        reg = <0xf 0xfe124000 0x0 0x2000>;
        ranges = <0x0 0x0 0xf 0xe8000000 0x8000000 0x2 0x0 0xf 0xff800000 0x10000 0x3 0x0 0xf 0xffdf0000 0x8000>;
        #address-cells = <0x2>;
        #size-cells = <0x1>;
        compatible = "fsl,ifc", "simple-bus";
        interrupts = <0x19 0x2 0x0 0x0>;

        nor@0,0 {
            #address-cells = <0x1>;
            #size-cells = <0x1>;
            compatible = "cfi-flash";
            reg = <0x0 0x0 0x8000000>;
            bank-width = <0x2>;
            device-width = <0x1>;
        };

        nand@2,0 {
            #address-cells = <0x1>;
            #size-cells = <0x1>;
            compatible = "fsl,ifc-nand";
            reg = <0x2 0x0 0x10000>;
        };

        cpld@3,0 {
            compatible = "fsl,t1040d4rdb-cpld", "fsl,deepsleep-cpld";
            reg = <0x3 0x0 0x300>;
        };
    };

I hope you are able to understand what is my point of confusion.

Re: T1042 LAW vs CCSR Memory Maps

Local Access Windows (LAWs) are used to configure, how processor address space is mapped to target interfaces - DDR controller, IFC controller, PCI-E and etc.

CCSR space is space, where internal processor memory-mapped registers are mapped to address space.

Table 2-3 shows IFC as "target" - target devices, connected to IFC controller, can be accessed via this window.

Table 2-5 shows IFC-related memory mapped registers, i.e. registers used to configure IFC controller.

Have a great day,
Alexander
TIC

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Re: T1042 LAW vs CCSR Memory Maps

The distinction between T1042 LAW and CCSR memory maps is interesting, especially when looking at how memory regions are organized and accessed. Clear documentation of address ranges can make technical comparisons much easier. I’ve also found that reviewing structured Greenville County Records can be a useful example of how organized information supports efficient research. Overall, this is a helpful topic for anyone working with memory mapping concepts.