2421430_en-US

iMX8 Mini / Nano with DDR4

Hi!

We are designing a board with compatibility for both iMX8 Mini and Nano,
employing DDR4 memory chips: the Nano is DDR controller is 16x so one chip,
the Mini is 16x/32x, so could go with one or two chips.

Given that with 16x one of the chips is unpopulated, I suppose the best routing
strategy is fly-by with termination. Could you confirm this?

When using one chip for 16x mode with the other lest unpopulated,
it's better to place this chip in the middle of the chain (minimize uP to memory length)
or near the end (minimize stub to termination)?

Do you have a reference design for iMX8 Mini with two DDR4 chips?

Thanks

Andrea