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When using the FRDM-MCXN947's I3C interface for I2C communication, the Clk stretching capability fai

Hello, I'm currently encountering a problem: I want to use the I3C interface of the FRDM-MCXN947 for I2C communication,but the slave device I'm connecting to experiences clock stretching during data preparation,so I have to wait for the slave device to release the SCL signal before data transfer can begin.

I've tried using the configurable registers (such as MCONFIG[SKEW] = 0, MCONFIG[HKEEP] = 0b11, MCONFIG[MSTENA] = 0b11) from the MCXNP184M150F70RM reference file, but it doesn't seem to be working. How can I resolve this?

#FRDM-MCXN947 #I3C 

Communication & Control(I3C | I2C | SPI | FlexCAN | Ethernet | FlexIO)MCXNRe: When using the FRDM-MCXN947's I3C interface for I2C communication, the Clk stretching capability

Hi @kevin_Jhuang 

The register settings are currently applied before I3C_MasterInit(), so they may be overwritten by the SDK initialization.

Please enable:

masterConfig->disableTimeout = true;

Then configure MSTENA = 3, HKEEP = 3, and SKEW = 0 after I3C_MasterInit(). Please clear the corresponding register fields before writing them instead of using |=.

After initialization, please read back MCONFIG to verify that the settings are still active. Also provide the MSTATUS and MERRWARN values captured immediately after the clock-stretching failure.

Please also confirm that SCL and SDA are configured for open-drain operation and that external pull-up resistors are installed.

BR

Harry