Hi NXP team,
We are using an S32E288-975EVB daughter card. The board was working normally until we flashed a new application. After programming the new code, the processor appears to remain continuously in reset, and we are no longer able to proceed with normal debugging/programming.
Current observations:
Could you please advise:
Hi,vishal
Thank you for contacting us.
Could you share more information with me?
1.What is the new application are you using?
2.What is the Boot Mode? Have you tried other boot mode via change switch on your development Board?
3. are you using debugger of S32DS debug probe or Trace32 for your application?
BR
Joey
Hi,yogeshwar
Thank you for your reply.
I suspect that PMIC has some issue on your board, please test the voltage of PMIC_PGOOD/PMIC_RESET_B by using the oscilloscope if still at the low status.
Also, did you have any operate for your PMIC before?
BR
Joey
Hi,vishal
Thank you for your reply and detail informaiton.
1.Could you test the POR_B and RESET_B states by the entire power-on process? The oscilloscope can be used to capture the power-on states of both components to check whether they remain at a low level throughout the power-on process, or whether there is a short period of high level followed by being pulled down by the SOC.
2.Please checking whether POR_B be pulled down during the whole power-on process when J130 header is not removed.
3.Also, you can try to use the oscilloscope to check the power states by refer to the power sequencing.
Hope this information can help you!
BR
Joey
Hi,
We removed the J131 header to isolate PMIC_RESET_B from RESET_B. After removing J131, the PMIC_RESET_B LED turned OFF, while the RESET_B LED remained ON.
We also verified that SW9 is functioning correctly by powering OFF the board and checking its operation.
As an additional isolation step, we removed the J130 header and measured both inputs of U41 (AND gate). Both inputs were measured at 3.3 V; however, the POR_B output was at GND level (LED ON).
Additionally, with the board powered OFF, we confirmed that there is no hard short between RESET_B and GND. Based on these observations, RESET_B and POR_B appears to be pulled to GND only when the board is powered ON.
Hi,
Thank you for the advice.
Power up sequence remains same for both working and failed EVL board.
During this exercise, both J131 and J130 Headers were not connected.
Failed EVL board
Reset_B and POR_B LEDs remain continuously ON.
Working EVL board
Another difference observed, in terms of resistance measurement on Power rails. The voltage level of power rails is good.
| RESISTANCE (ohms) | |||
POSITIVE (RED) | NEGATIVE (BLACK) | Working | Non working |
| 3.3V | GND | 300 | 6 |
| 0.8V | GND | 7.2 | 5.6 |
3.3V | 0.8V | 335 | 11 |