Hello NXP Support,
I would like to ask some questions on S32K3's VRC_CTRL (PTE13).
(1) RM mentions VRC_CTRL is direct signal, could you please check the understanding/question in the following table (red font)?
ALTx | OBE | IBE | VRC_CTRL | Question |
GPIO | Disabled | Disabled | Enabled | VRC_CTRL will take effect, right? |
GPIO | Disabled | Enabled | Enabled | VRC_CTRL will still take effect, right? |
GPIO | Enabled | Not Care | Enabled | Who will take effect? |
(2) If we configure PTE13 as GPIO + OBE Enabled + Output Level Low, will the VRC_CTRL negative feedback mechanism be broken because VRC_CTRL is treated as error signal and now maybe GPIO and VRC_CTRL are driving the pin at the same time?
(3) In NXP MCAL, as long as I configure PTE13 as PG_VRC_CTRL_OUT, OBE will be automatically set by function Port_Ipw_SetOnlyOutputMode(), is it an issue of MCAL?
(4) How to test VRC_CTRL feedback mechanism , what waveform is expected during which condition?
(5) Why is MSCR141 documented as "Not Supported" in RM?
Thanks.
BR