2417355_en-US

[#1]

[lf_v2026.04] uboot-imx patches to fix multi-block transfers in fsl_lpspi

Hello,

in the uboot-imx on i.MX93 with lf_v2025.04, SPI transfers through fsl_lpspi
fail as soon as a full FIFO block follows another block, e.g. with an SPI TPM:

=> tpm2 get_capability 0x6 0x100 $loadaddr 20
lpspi_xfer_single: RX Timeout!

Root cause: spi_xfer_single() queues an extra TCR after every block.
The command occupies a TX FIFO entry and is loaded only after a delay.
If the next block starts before that, one data word is not accepted
and the RX loop waits for it until timeout.

The attached series fixes this (applies also to lf_v2026.04):

1/3 widen FSR TXCOUNT/RXCOUNT masks (for parts with deeper FIFOs)
2/3 fix multi-block transfers (the actual fix)
3/3 make spi_xfer_single() a static function (no functional change)

Tested on an i.MX93 board with an SPI TPM 2.0 (GPIO chip select).
Note: the new code eventually deasserts chipselect only if it is muxed as GPIO,
but we did not fully verify this.

It would be great if this could be included in a future uboot-imx release.

Thanks and Best Regards,
Tycho Kirchner
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PS:
@xiaoningwang appears to be the original author, maybe you would like to take a look.

Re: [lf_v2026.04] uboot-imx patches to fix multi-block transfers in fsl_lpspi

I have passed the patches to the development team, thanks for your suggestion.