Hello,
We are developing a Power Distribution Unit around the S32K344 (HSE_FW_S32K344_0_2_55_0, 0.2.55.0 build pb150130 (30 janvier 2025). Type : Standard FW configuration) with a dual-bank bootloader and secure firmware update. We are stuck on one point of the flash layout and would appreciate a definitive answer.
The problem
Our NVM configuration regions (runtime parameters written by the application) currently live in PFLASH Block 0, in the same block as the executing code. Writing to them at runtime triggers read-while-write stalls on the core, which freezes the unit for the duration of the program/erase operation. This is not acceptable for our application (the PDU drives safety-relevant loads).
The obvious fix is to move these regions to a block that does not contain executed code. Block 2 (0x600000–0x6FFFFF, sectors 368–381) is the natural candidate: it is not used by our application banks, and it is not the block where HSE stores its data.
What we have checked so far
– The S32K3xx Reference Manual describes the PFLASH block structure but does not say anything about HSE reservations.
– The public HSE Basic FW FAQ states that Blocks 0 and 1 are guaranteed for the application, and that the HSE firmware reserves part of Block 3 (176 KB in FULL_MEM configuration). It does not mention Block 2 at all.
– The HSE demo application and RTD examples we looked at do not use Block 2 either, so we cannot infer anything from them.
– We have submitted an NDA / DocStore access request for the HSE Firmware Reference Manual v2.4, which we understand covers this. The request is pending.
Questions
Until we have a confirmed answer, our design is deliberately confined to Blocks 0 and 1, which leaves us with the read-while-write issue.
Thank you in advance for your help.
Hello @manu_fenixecu,
A1. Yes, Block 2 is entirely user flash.
Refer to HSE-B FW RM v2.7, Figure 33 (FULL_MEM) and Figure 34 (AB_SWAP) for the flash memory layout of S32K344, S32K314, and S32K324.
A2. HSE-B FW RM v2.7, Section 14.6.4.2 (HSE_CONFIG_GPR3) — the application should read bit 27.
A3. The only publicly available reference is the S32K3xx RM rev12, Table 198 ("Configuration details when the HSE_B firmware usage feature flag is enabled"). The HSE-B FW RM cannot be shared without an NDA in place. For HSE-related support, please use support tickets rather than this public community.
Regards,
Daniel
Thank you for sharing