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Could you please provide me the PCB design guide for IFC interface of LS1021A

Hi,

On my board,  IFC interface of LS1021A will directly connect to two Flash、two PHY with MCU interface and 2x buffer( SN74LVC16245A)。PCB routing will be very complicated. So, 

1. What kind of routing topology could be accepted from SI point of view?

2. Could you please provide me the PCB design guide for IFC interface of LS1021A

Thanks in advacnce!


Best regards!

Jason

QorIQ LS1 DevicesRe: Could you please provide me the PCB design guide for IFC interface of LS1021A

Hi, June:

Like below figure shown, my circuit is a little complicated. IFC bus will drive total 8x chips through some buffers.  Cause IFC interface use asynchronous mode, the rate of IFC is not high. Do you have general route guide for IFC interface like ethernet one given me by Yiping.wang?

Jason_in_job_0-1789111004993.pngJason_in_job_0-1789111004993.pngJason_in_job_0-1789111004993.png


Thanks in advance!

Best regards!

Jason

Re: Could you please provide me the PCB design guide for IFC interface of LS1021A

Please share the details of your topology

1. Will the two SN74LVC16245A devices be used to buffer or isolate the IFC address/data bus?

2. What type of Flash devices will be connected to the IFC interface (NOR Flash, NAND Flash, etc.)?

3. How are the two PHY devices connected to the IFC interface? Are they using GPCM mode?

4. Could you please confirm the complete IFC loading? Is it comprised of two Flash devices and two MCU-interface PHY devices?

Thanks

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