As part of the code migration task, we are facing an issue where the BSF flag is being set. Due to the BSF flag being set, the EMON bit in the Minutes register is also getting set.
As a result, the Minutes value displayed on the screen is showing an arbitrary value. Additionally, the Year value is not being saved correctly and continuously shows 2000 even after setting the RTC date and time.
I tried to test the condition mentioned below, but the problem still persists.
I set the flag register (0x43) to 0x00 and read it immediately; it showed 0x00. However, when I read the register again after 3 seconds, the value was set again to 0x08 (or 0x00).
Hello Ris_eek
Good day!
The BSF flag is not simply failing to clear. Instead, the RTC is detecting a new battery switch-over event and setting BSF again. According to the datasheet, BSF is set whenever the battery switch-over logic detects a power transition event
The fact that it re-asserts after ~3 seconds means the VDD supply is repeatedly dropping below the battery switch-over threshold causing repeated VDD>VBAT>VDD transitions. Each transition re-sets the BSF.
This constant voltage fluctuation causes the RTC to constantly reset, which is why it only shows the year 2000. I recommend checking if there's a problem with the power supply signal.
I hope this information has helped you, please let me know if you need help with anything else.
Have a great day and best of luck.
In the hardware, the VDD (4.93 VDC) and VBAT (3.02 VDC) voltages are constant. As a precaution against voltage fluctuations, a 100 nF capacitor is connected across the battery supply.
The Battery Switch Register (26h) is set to 0x00. Therefore, the BSM (Battery Switch Mode) is configured to switch at the Vth level. The Vth level is 1.5 V because the BSTH (Battery Switch Threshold Voltage) bit is set to 0.
As per Figure 25, referenced in previous email:
When VDD < Vth, the BSF is set to 1.
When VDD > VBAT, the BSF should be cleared.
However, under the power-ON condition, the measured voltage is VDD = 4.93 VDC, which is greater than VBAT = 3.02 V. Even then, the BSF is not cleared.
Could you please clarify why the BSF remains set even though VDD is greater than VBAT?
Hello Ris_eek
Good day!
The datasheet says the following:
The assertion of the flag BSF (register Flags, address 2Bh) can be used to generate an interrupt at pins INTA and INTB. The interrupt can be generated as a pulsed signal or alternatively as a permanently active signal, which follows the condition of bit BSF. BSF remains set until cleared by command.
The reference image I sent also indicates the following: "cleared via interface."
It’s not automatically, you have to cleared
I hope this information has helped you, please let me know if you need help with anything else.
Have a great day and best of luck.
Thank you for this.
But the BSF flag is cleared in software, but after some time, it is set again, as described in my previous post.