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Question About SD2_VSEL and SD2_RST_B Connections on i.MX95 19x19 EVK

Dear NXP Support Team,

While reviewing the i.MX95 19x19 CPU EVK board schematic, I noticed that the SD2_VSEL and SD2_RST_B signals are connected to the FP09 GPIO1 and GPIO2 pins.

Could you please explain the purpose of these connections in more detail?

In particular, I would like to understand why these two signals are connected to the GPIO pins and how they are intended to be controlled or used in the system.

Best regards,

Walter

Re: Question About SD2_VSEL and SD2_RST_B Connections on i.MX95 19x19 EVK

The intent is to let the i.MX95 uSDHC2 block control the SD-card power rails through the PF09 PMIC, rather than treating those nets as ordinary board GPIOs.

• SD2_VSEL → PF09 GPIO1 : this is for SD/SDIO voltage switching. The i.MX95 uSDHC VSELECT output is defined as a signal used to change the external power-supply voltage, and the controller supports voltage selection through VEND_SPEC[VSELECT] . In PF09, GPIO1 can be configured as a dedicated VSELECT input ; when enabled, GPIO1 selects LDO2 = 3.3 V when low and LDO2 = 1.8 V when high . This matches the SD3.0 requirement that the platform implement both 3.3 V and 1.8 V signaling.
• SD2_RST_B → PF09 GPIO2 : this is for card power/reset control. The i.MX95 RESET_B signal is described as optional, active-low, and for a removable card it can be used “instead of hardware reset to enable/disable Card power during warm reset.” PF09 GPIO2 can be configured as an LDO1EN input , where the pin enables or disables the LDO1 output by hardware. So the EVK connection gives the uSDHC2 reset/power-control signal a direct path to the PMIC-controlled SD-card supply.

In practical terms, these PF09 pins are not being used as random expansion GPIOs on the EVK. They are multi-function PMIC pins wired so the SD host controller can request the correct SD-card rail behavior:

Signal	PF09 pin role	System purpose
SD2_VSEL	PF09 GPIO1 in VSELECT mode	Switch NVCC_SD2 /SD I/O supply between 3.3 V and 1.8 V for SD3.0 operation.
SD2_RST_B	PF09 GPIO2 in LDO1EN mode or equivalent card-power control role	Enable/disable SD-card power, especially around reset/warm-reset behavior.

So the control path is typically: uSDHC2 driver/U-Boot configures the SD host controller → uSDHC2 drives SD2_VSEL and/or SD2_RST_B → PF09 interprets those pins according to its OTP/configuration → PF09 changes the SD-related LDO state . PF09’s GPIO modes/default behavior are OTP-configurable, and its GPIO outputs can also be controlled in system-on states when configured as GPOs, but the EVK wiring is intended to use the PMIC’s dedicated SD power-management functions rather than manual bit-banging.

Bottom line: SD2_VSEL and SD2_RST_B are routed to PF09 GPIO1/GPIO2 so the i.MX95 uSDHC2 interface can perform SD-card voltage switching and card power/reset control through the PMIC.

Re: Question About SD2_VSEL and SD2_RST_B Connections on i.MX95 19x19 EVK

Hello,

Yes. Those connections are intentional SD2_VSEL and SD2_RST_B are used to let the i.MX95 USDHC2 interface control the SD-card power/reset behavior through the PF09 PMIC, rather than being ordinary GPIO signals.

SD2_VSEL → PF09 GPIO1: controls the SD-card I/O voltage switching, typically between 3.3 V and 1.8 V for SD 3.0 operation.
SD2_RST_B → PF09 GPIO2: provides SD-card power/reset control, particularly useful during reset or power-cycle sequences.
So the intended path is essentially:

i.MX95 USDHC2 → SD2_VSEL / SD2_RST_B → PF09 → SD-card power rails

The Linux device tree also shows SD2_VSELECT being used by USDHC2 and SD2_RESET_B being used for SD-card power control, which confirms these are part of the normal SD-card design rather than spare GPIOs.