2408705_en-US

[#1]

RT1052 operating mode issue

Dear NXP Technical Support:

Hello!

The SDK for Zhengdian Atom's RT1052 development board includes two types of example programs: XIP running mode and SDRAM running mode. The SDRAM running mode can only run in debug mode; if power is lost, the debugger is disconnected, and the system is restarted, the program will not run. The XIP running mode programs from Zhengdian Atom are for educational purposes and are certainly not as complete as the official NXP SDK in some aspects.

I have a question: Is the routine in "C:\Users\admin1\Desktop\SDK_25_06_00_EVKB-IMXRT1050\boards\evkbimxrt1050\lvgl_examples\lvgl_demo_widgets\mdk\flexspi_nor_sdram_releasep" running in XIP or SDRAM mode? I checked the compiled MAP file, and the execution region is located in both QSPI FLASH and SDRAM. Then, the LVGL files run in both QSPI FLASH and SDRAM. So, is the memory space defined by "#define LV_MEM_SIZE (500 * 1024U)" in the lv_conf.h file in SDRAM or internal RAM?

Re: RT1052的运行模式问题I understand. Thank you!Re: RT1052的运行模式问题

Hi @FromCH0 ,

Thank you for contacting the NXP technical support team!

The project `flexspi_nor_sdram_release` is not in pure SDRAM debug mode, but rather in a hybrid mode defined by the NXP SDK: FlexSPI NOR Flash XIP + SDRAM Data. The official NXP SDK 25.06.00 documentation explicitly states that the program text for this target resides in the FlexSPI NOR Flash and can be executed directly via XIP, while the readable and writable data resides in external SDRAM.

Please refer to: https://docs.mcuxpresso.nxp.com/mcuxsdk/25.06.00/html/boards/RT/evkbimxrt1050/gettingStarted/topics/...

Therefore, it is normal to see both QSPI/FlexSPI Flash and SDRAM Execution Regions in the MAP file. Typically, LVGL function code and read-only constants reside in Flash, while LVGL runtime variables, dynamic memory pools, and display buffers reside in SDRAM. A source file may also generate code segments in Flash and data segments in SDRAM simultaneously; its execution location cannot be determined solely by the source file as a whole.

LV_MEM_SIZE (500 * 1024U) only defines the size of the LVGL internal dynamic memory pool and does not directly specify the address. If the project uses the LVGL built-in memory manager, does not enable a custom allocator, and does not set a fixed memory pool address, then under the flexspi_nor_sdram_release linker configuration, this approximately 500 KiB memory pool is usually placed as RW/ZI data in external SDRAM, rather than on-chip RAM.

You can try searching for work_mem, lv_mem, or the corresponding LVGL memory pool symbol in the generated MAP file to confirm: the address 0x800xxxxx indicates that it is located in external SDRAM.

Best regards,
Gavin