Is it possible to drive RTC_XTALI with external clock with dc level of 1.8V?
since ensuring that external clock match VDD_SNVS_ANA will increase the design complexity. Also 1.8V is below the absolute maximum rating of clock inputs.
Hi @Marwan,
As stated in the Hardware Development Guide for the MIMXRT1160/1170 Processor, if you want to feed an external low-frequency clock into RTC_XTALI, the RTC_XTALO pin must remain unconnected or be driven by a complementary signal. The logic level of this forcing clock must not exceed the VDD_SNVS_DIG level.
Additionally, the i.MX RT1170 Crossover Processors Data Sheet states that VDD_SNVS_DIG has an operating voltage range of 0.81 V to 0.95 V, with a typical value of 0.85 V.
This means that a 1.8 V signal would exceed the VDD_SNVS_DIG voltage level.
Best Regard,
Pablo