The RTL8211FI can obtain the PHY address through MDIO/MDC and access the internet normally, but the two TJA1120A cannot obtain the PHY address through MDIO/MDC nor access the internet normally. What is the reason for this? Is there any hardware that needs to be adjusted or modified?
1. Utilize the NXP i.MX95 SOC to externally connect three network card PHYs: one RTL8211FI and two TJA1120A, where the two TJA1120A are externally expanded through SJA1105S.
2. Resource allocation:
(1) Assign ENET1 of NXP i.MX95 to RTL8211FI (PHY address is 001)
(2) Assign ENET2 of NXP i.MX95 to SJA1105S, assign RGMII1 of SJA1105S to the first TJA1120A (PHY address 002), and assign RGMII2 of SJA1105S to the second TJA1120A (PHY address 004)
3. Please refer to the PDF for the schematic diagram
Hello @leven ,
From the schematic review, one possible issue is the voltage level on the MDIO/MDC interface connected to the TJA1120A devices.
The TJA1120A VDDIO appears to be connected to the 1.8 V domain. Therefore, the MDIO and MDC signals connected to the TJA1120A should also be compatible with this 1.8 V I/O domain.
However, in the schematic the MDIO/MDC signals to the TJA1120A devices appear to be routed through the U20 level translator. The ENET1_MDIO_BUF / ENET1_MDC_BUF side, which is connected toward the TJA1120A devices, appears to be on the 3.3 V side of the level shifter. This would create a mismatch, because the TJA1120A MDIO/MDC pins are referenced to the 1.8 V VDDIO domain.
This may explain why the RTL8211FI can be accessed correctly, while the TJA1120A devices cannot be detected over MDIO. The RTL8211FI MDIO/MDC connection appears to be on the 1.8 V side, which matches its configured I/O voltage.
Please check the MDIO and MDC voltage levels directly on the TJA1120A pins with an oscilloscope. If they are driven at 3.3 V while the TJA1120A VDDIO is 1.8 V, the hardware connection should be corrected so that the MDIO/MDC signals use the same voltage domain as the TJA1120A VDDIO.
Best regards,
Pavel