2403713_en-US

[#1]

i.MX8M Plus HiFi4 DSP (Zephyr): SDMA cyclic TX callback fires once then stops

On the i.MX8MP HiFi4 DSP running Zephyr, I'm bringing up a hardware-endpoint playback path using the Zephyr nxp,dai-sai (SAI3) and nxp,sdma (SDMA3) drivers in cyclic mode. On start playback, the SDMA channel completion callback fires exactly once, then no further SDMA interrupts occur. I'd like help identifying why the cyclic SDMA transfer does not keep generating periodic interrupts.

  Hardware / boot
  - Board: i.MX8MP EVK, DTS: imx8mp-evk-dsp.dts
  - DSP core: HiFi4 (Cadence Xtensa), board target imx8mp_evk/mimx8ml8/adsp
  - Codec: WM8960
  - Peripherals: SAI3, SDMA3

  Architecture and Build details:
  - Architecture Overview: https://audioreach.github.io/platform/nxp.html#architecture-overview 
  - Build Details:
    - Yocto: https://audioreach.github.io/platform/nxp.html#step-1-create-a-yocto-image
      - Linux (control/host): Yocto (scarthgap), linux-imx.
      - Repo manifest: imx-6.6.52-2.2.0.xml
    - Zephyr DSP Image: https://audioreach.github.io/platform/nxp.html#step-2-create-a-zephyr-image

      - Zephyr (v4.2.0), AudioReach Engine signal processing framework running on the HiFi4.

  What I'm building
  A custom hardware-endpoint (sink) module in the DSP image that:

  1. Configures SAI3 via the Zephyr DAI API.
  2. Sets up a cyclic SDMA transfer (2 buffer descriptors, MEMORY_TO_PERIPHERAL) from a DRAM ring into the SAI TX FIFO.
  3. Uses the SDMA completion callback to signal the Signal Processing Framework to refill the ring.

  Audio format
  - 48 kHz, 16-bit, mono stream; SAI wire = 16-bit × 2 slots (stereo I2S frame for WM8960), BCLK = 1.536 MHz.
  - DMA period = 192 bytes (48 frames × 2 bytes × 2 slots), 2 descriptors, 384-byte ring

  Relevant Kconfig (DSP image) enabled

  CONFIG_DAI=y
  CONFIG_DMA=y
  CONFIG_DAI_NXP_SAI=y
  CONFIG_DMA_NXP_SDMA=y
  CONFIG_SAI_HAS_MCLK_CONFIG_OPTION=y
  CONFIG_CLOCK_CONTROL_FIXED_RATE_CLOCK=y

  Device tree overlay (DSP app):
  Link: app/boards/imx8mp_evk_mimx8ml8_adsp.overlay 

 mclk1: mclk {
    status = "okay";
  };

  &sdma3 {
    status = "okay";
  };

  &sai3 {
    rx-fifo-watermark = <65>;
    tx-fifo-watermark = <65>;
    fifo-depth = <128>;
    rx-sync-mode = <1>;
    status = "okay";
  };

  &micfil {
    status = "okay";
  };

  DAI / DMA config used (DSP)

  - dai_config: type=DAI_IMX_SAI, dai_index=3, format= DAI_PROTO_I2S (SAI slave), rate=48000, channels=2, word_size=16.
  - SAI bespoke: mclk_rate=12288000, fsync_rate=48000, bclk_rate=1536000, tdm_slots=2, tx_slots=rx_slots=0x3, tdm_slot_width=16.
  - DMA (struct dma_config): channel_direction=MEMORY_TO_PERIPHERAL, source_data_size=4, dest_data_size=4, source_burst_length=4, cyclic=1, block_count=2, dma_slot from SAI handshake, dma_callback set. Two dma_block_config BDs point at dma_src_addr[0/192]

Source code reference: endpoint/capi/src/capi_nxp_device_utils.c

Application Processror:
  - DTS: imx8mp-evk-dsp.dts https://github.com/nxp-imx/linux-imx/blob/lf-6.6.y/arch/arm64/boot/dts/freescale/imx8mp-evk-dsp.dts
  - Enumerate PCM device with wm8960 codec with dummy dai and dummy platform.

Attachments:
- DSP logs (sdma, sai)
- Modified imx8mp-evk-dsp.dts 

Happy to provide any other details.

i.MX 8M | i.MX 8M Mini | i.MX 8M NanoMultimedia