2403567_en-US

[#1]

Voltage injection tests for OV and UV scenarios and associated behavior

Hello Community, 

SBC FS4503 is used in one of our projects and configured as below for OV / UV conditions.

VCCA, VCORE and VAUX are configured to have impact on FS0B only in an OV condition and an impact on RSTB and FS0B both in case of an UV condition.

Voltage injection test was performed by injecting voltages at the VCORE, VAUX and VCCA pins by using a second power supply while the first power supply provided 12V input to the SBC. 

Results of the test as below:
1. VAUX OV - Asserts FS0B,
2. VAUX UV- Triggers RESET
3. VCORE OV- Asserts FS0B but VCORE is cut off, as mentioned in the data sheet.
4. VCORE UV- Triggers RESET
5. VCCA OV- Asserts FS0B, but VCORE is pulled down for a short time, and hence reset
6. VCCA UV- Triggers RESET.
VPRE- OV - Datasheet mentions regulator is switched off, and we observe a RESET.

Below are the queries:

1. Is the Bench test procedure valid? Where, for OV conditions around 5.5V was injected on the respective pin and for UV conditions around 3.5V was injected on the pins.
2. Is the observation with VCCA OV condition acceptable?
3. When an OV condition occurs at VPRE, the datasheet mentions the regulator is switched off, does this cut-off the VCORE supply as well?

Thank you,

Aditya

Re: Voltage injection tests for OV and UV scenarios and associated behavior

1. Is the Bench test procedure valid? Where, for OV conditions around 5.5V was injected on the respective pin and for UV conditions around 3.5V was injected on the pins.

[gw]OV should use voltage above 5.5V, UV test should be lower than 3V.

Also need meet the filter time and reaction time requirement.

2. Is the observation with VCCA OV condition acceptable?

[gw]Does the second power supply(OV voltage) reverse-supply through the VCCA pin, causing disturbances in the VPRE/VCORE loop?

Did you monitor the VPRE during this VCCA OV test？

3. When an OV condition occurs at VPRE, the datasheet mentions the regulator is switched off, does this cut-off the VCORE supply as well?

[gw]Yes, VCORE is provided by VPRE.

Re: Voltage injection tests for OV and UV scenarios and associated behavior

Hello @guoweisun , 

Thank you for the response. This is helpful. 

Please find my queries below:

[gw]Does the second power supply(OV voltage) reverse-supply through the VCCA pin, causing disturbances in the VPRE/VCORE loop?

Did you monitor the VPRE during this VCCA OV test？

[ab]: VPRE was not monitored. I will monitor it with new tests. Could you please help me understand what is meant by reverse-supply through VCCA pin?

[gw]OV should use voltage above 5.5V, UV test should be lower than 3V.

"Also need meet the filter time and reaction time requirement."

[ab]: As I am performing this activity manually, the filter time of 100-200us and reaction time of 314us are satisfied for the OV cases. 

Below are some additional queries, 

1. How is OV/ UV detected, what is the sampling rate used by the SBC?

2. What is the significance of the filter time and reaction time?

2. How many not ok samples are allowed before detecting an OV/ UV fault on any of the pins?

Thank you,

Aditya