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Issues related to RAM space allocation

Hello to all NXP official technical staff,
I have encountered some problems while using the S32K144.

Ni__0-1786357891196.png
In this address allocation table

The size of the System RAM spaces SRAM_L (extends downwards) and SRAM_U (extends upwards).

Does the S32K144 chip support user customization?

The problem of allocating addresses for global variables

Global variables with non-zero initial values are stored in SRAM_L.

Variables initialized to zero are stored in SRAM_U.

This is why, and also if SRAM_L and SRAM_U support custom sizes.

Are there any rules regarding the start and end addresses of their two address ranges?

Why do global variables with or without initial values have different address ranges allocated by the chip?

I'd like to learn more about the flash memory allocation for this chip. If there are any tutorials or resources available, could you tell me where I can download them?


I sincerely look forward to your reply.

Thank you so much!


Re: 关于RAM空间分配的问题
dear VaneB
I don‘t know if it's appropriate to address you like this
I learned a lot from receiving your reply
Thank you very much for your careful explanation
But I still have one question
Is there a document that outlines the writing specifications for linker script files
I would like to learn about the writing style and grammatical structure of script files
My English proficiency is not very good
I hope you can understand what I mean

I sincerely look forward to receiving your reply

Thank you very much.

Re: 关于RAM空间分配的问题

Hi @Ni_ 

SRAM_L and SRAM_U are physical memory regions with fixed address ranges defined by the device architecture. Accesses cannot occur across the 0x20000000 boundary that separates the two SRAM arrays. Therefore, the arrays must be treated as independent memory regions when performing burst accesses.

The linker is not responsible for automatically distributing objects across SRAM_L and SRAM_U. Instead, the placement of variables and sections is determined by the linker script defined by the developer. Therefore, it is up to you to decide how memory sections are allocated between SRAM_L and SRAM_U, provided that the assigned addresses remain within the valid memory ranges of the device.


BR, VaneB

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