The i.MXRT1052 communicates with the FPGA using SRAM AADM mode, but some signals are not output.
I'm currently using AADM mode. However, during the actual configuration, I didn't see WE# and OE#. It's still configured as SEMC_ADDR11/SEMC_ADDR12. These two signals haven't changed on the FPGA side. But the data and address have changed, and ADV# has also changed. SEMC_CS0 remains unchanged.
Why is this? I see the SEMC Pin Mux in the manual. SEMC_ADDR11 is WE#, and SEMC_ADDR12 is OE#, but OE# and WE# are not present when configuring in MCUXpresso Config Tools 26.06.
Or is there some other reason why there is no signal?
Hi @SDFDSFSF ,
Please note that you should not use SEMC_CS0 as the chip select for the FPGA SRAM. SEMC_CS0 is SDRAM CS0, and the SRAM should use SEMC_CSX[3:0], and the corresponding MUX_CSXx should be configured as SRAM CE# in SEMC->IOCR.
Additionally, after confirming peripheral initialization, register SRAMCR0.AM = 01 (AADM). When SRAM is operating in AADM mode, SEMC will automatically define SEMC_ADDR11 as WE# and SEMC_ADDR12 as OE#.
Best Regards,
Shelly